12SN/A/* 21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Nathan Binkert 302SN/A */ 312SN/A 3211793Sbrandon.potter@amd.com#include "cpu/static_inst.hh" 3311793Sbrandon.potter@amd.com 342SN/A#include <iostream> 358229Snate@binkert.org 364167Sbinkertn@umich.edu#include "sim/core.hh" 372SN/A 3812404Sgabeblack@google.comnamespace { 3912404Sgabeblack@google.com 4012404Sgabeblack@google.comstatic TheISA::ExtMachInst nopMachInst; 4112404Sgabeblack@google.com 4212404Sgabeblack@google.comclass NopStaticInst : public StaticInst 4312404Sgabeblack@google.com{ 4412404Sgabeblack@google.com public: 4512404Sgabeblack@google.com NopStaticInst() : StaticInst("gem5 nop", nopMachInst, No_OpClass) 4612404Sgabeblack@google.com {} 4712404Sgabeblack@google.com 4812404Sgabeblack@google.com Fault 4912404Sgabeblack@google.com execute(ExecContext *xc, Trace::InstRecord *traceData) const override 5012404Sgabeblack@google.com { 5112404Sgabeblack@google.com return NoFault; 5212404Sgabeblack@google.com } 5312404Sgabeblack@google.com 5412404Sgabeblack@google.com void 5512404Sgabeblack@google.com advancePC(TheISA::PCState &pcState) const override 5612404Sgabeblack@google.com { 5712404Sgabeblack@google.com pcState.advance(); 5812404Sgabeblack@google.com } 5912404Sgabeblack@google.com 6012404Sgabeblack@google.com std::string 6112404Sgabeblack@google.com generateDisassembly(Addr pc, const SymbolTable *symtab) const override 6212404Sgabeblack@google.com { 6312404Sgabeblack@google.com return mnemonic; 6412404Sgabeblack@google.com } 6512404Sgabeblack@google.com 6612404Sgabeblack@google.com private: 6712404Sgabeblack@google.com}; 6812404Sgabeblack@google.com 6912404Sgabeblack@google.com} 7012404Sgabeblack@google.com 712107SN/AStaticInstPtr StaticInst::nullStaticInstPtr; 7212404Sgabeblack@google.comStaticInstPtr StaticInst::nopStaticInstPtr = new NopStaticInst; 732SN/A 745870Snate@binkert.orgusing namespace std; 755870Snate@binkert.org 765870Snate@binkert.orgStaticInst::~StaticInst() 775870Snate@binkert.org{ 785870Snate@binkert.org if (cachedDisassembly) 795870Snate@binkert.org delete cachedDisassembly; 805870Snate@binkert.org} 815870Snate@binkert.org 822SN/Abool 837720Sgblack@eecs.umich.eduStaticInst::hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, 847720Sgblack@eecs.umich.edu TheISA::PCState &tgt) const 852SN/A{ 862SN/A if (isDirectCtrl()) { 872SN/A tgt = branchTarget(pc); 882SN/A return true; 892SN/A } 902SN/A 912SN/A if (isIndirectCtrl()) { 922680Sktlim@umich.edu tgt = branchTarget(tc); 932SN/A return true; 942SN/A } 952SN/A 962SN/A return false; 972SN/A} 982SN/A 993271Sgblack@eecs.umich.eduStaticInstPtr 1007720Sgblack@eecs.umich.eduStaticInst::fetchMicroop(MicroPC upc) const 1013271Sgblack@eecs.umich.edu{ 1024539Sgblack@eecs.umich.edu panic("StaticInst::fetchMicroop() called on instruction " 1035870Snate@binkert.org "that is not microcoded."); 1043271Sgblack@eecs.umich.edu} 1053271Sgblack@eecs.umich.edu 1067720Sgblack@eecs.umich.eduTheISA::PCState 1077720Sgblack@eecs.umich.eduStaticInst::branchTarget(const TheISA::PCState &pc) const 1085870Snate@binkert.org{ 1095870Snate@binkert.org panic("StaticInst::branchTarget() called on instruction " 1105870Snate@binkert.org "that is not a PC-relative branch."); 1115870Snate@binkert.org M5_DUMMY_RETURN; 1125870Snate@binkert.org} 1135870Snate@binkert.org 1147720Sgblack@eecs.umich.eduTheISA::PCState 1155870Snate@binkert.orgStaticInst::branchTarget(ThreadContext *tc) const 1165870Snate@binkert.org{ 1175870Snate@binkert.org panic("StaticInst::branchTarget() called on instruction " 1185870Snate@binkert.org "that is not an indirect branch."); 1195870Snate@binkert.org M5_DUMMY_RETURN; 1205870Snate@binkert.org} 1215870Snate@binkert.org 1225870Snate@binkert.orgconst string & 1235870Snate@binkert.orgStaticInst::disassemble(Addr pc, const SymbolTable *symtab) const 1245870Snate@binkert.org{ 1255870Snate@binkert.org if (!cachedDisassembly) 1265870Snate@binkert.org cachedDisassembly = new string(generateDisassembly(pc, symtab)); 1275870Snate@binkert.org 1285870Snate@binkert.org return *cachedDisassembly; 1295870Snate@binkert.org} 13010201SAndrew.Bardsley@arm.com 13110201SAndrew.Bardsley@arm.comvoid 13210201SAndrew.Bardsley@arm.comStaticInst::printFlags(std::ostream &outs, 13310201SAndrew.Bardsley@arm.com const std::string &separator) const 13410201SAndrew.Bardsley@arm.com{ 13510201SAndrew.Bardsley@arm.com bool printed_a_flag = false; 13610201SAndrew.Bardsley@arm.com 13710201SAndrew.Bardsley@arm.com for (unsigned int flag = IsNop; flag < Num_Flags; flag++) { 13810201SAndrew.Bardsley@arm.com if (flags[flag]) { 13910201SAndrew.Bardsley@arm.com if (printed_a_flag) 14010201SAndrew.Bardsley@arm.com outs << separator; 14110201SAndrew.Bardsley@arm.com 14210201SAndrew.Bardsley@arm.com outs << FlagsStrings[flag]; 14310201SAndrew.Bardsley@arm.com printed_a_flag = true; 14410201SAndrew.Bardsley@arm.com } 14510201SAndrew.Bardsley@arm.com } 14610201SAndrew.Bardsley@arm.com} 147