Searched refs:deque (Results 26 - 50 of 59) sorted by relevance

123

/gem5/src/dev/
H A D	dma_device.hh	48 #include <deque> 124 /** Use a deque as we never do any insertion or removal in the middle */ 125 std::deque<PacketPtr> transmitList; 526 std::deque<DmaDoneEventUPtr> pendingRequests; 527 std::deque<DmaDoneEventUPtr> freeRequests;
/gem5/src/cpu/pred/
H A D	bpred_unit.hh	50 #include <deque> 269 typedef std::deque<PredictorHistory> History;
/gem5/src/dev/mips/
H A D	malta_io.cc	41 #include <deque>
/gem5/src/dev/net/
H A D	etherlink.hh	101 std::deque<std::pair<Tick, EthPacketPtr>> txQueue;
H A D	dist_etherlink.cc	51 #include <deque>
H A D	i8254xGBe.hh	38 #include <deque> 226 typedef std::deque<T *> CacheType;
H A D	etherlink.cc	51 #include <deque>
/gem5/src/gpu-compute/
H A D	wavefront.hh	40 #include <deque> 169 std::deque<GPUDynInstPtr> instructionBuffer; 392 std::deque<std::unique_ptr<ReconvergenceStackEntry>> reconvergenceStack;
H A D	tlb_coalescer.hh	190 std::deque<PacketPtr> retries;
H A D	compute_unit.hh	40 #include <deque> 450 std::deque<std::pair<PacketPtr, GPUDynInstPtr>> retries; 491 std::deque<std::pair<PacketPtr, Wavefront*>> retries; 528 std::deque<PacketPtr> retries; 575 std::deque<PacketPtr> retries;
H A D	gpu_tlb.hh	293 std::deque<PacketPtr> retries;
/gem5/src/dev/x86/
H A D	pc.cc	37 #include <deque>
H A D	i8042.hh	34 #include <deque>
/gem5/src/mem/
H A D	dram_ctrl.hh	57 #include <deque> 443 std::deque<Tick> actTicks; 748 typedef std::deque<DRAMPacket*> DRAMPacketQueue; 947 std::deque<DRAMPacket*> respQueue;
/gem5/src/mem/qos/
H A D	mem_ctrl.hh	49 #include <deque> 97 std::unordered_map<uint64_t, std::deque<uint64_t>> > requestTimes;
/gem5/ext/drampower/src/
H A D	CommandAnalysis.h	50 #include <deque>
/gem5/src/systemc/tests/tlm/multi_sockets/
H A D	MultiSocketSimpleSwitchAT.h	61 std::vector<std::deque<transaction_type*> > m_pendingReqs; //list of pending reqs per target 62 std::vector<std::deque<transaction_type*> > m_pendingResps; //list of pending resps per initiator
/gem5/ext/pybind11/tests/
H A D	test_stl.cpp	67 m.def("cast_deque", []() { return std::deque<int>{1}; }); 68 m.def("load_deque", [](const std::deque<int> &v) { return v.at(0) == 1 && v.at(1) == 2; });
/gem5/ext/pybind11/include/pybind11/
H A D	stl.h	19 #include <deque> 189 template <typename Type, typename Alloc> struct type_caster<std::deque<Type, Alloc>> 190 : list_caster<std::deque<Type, Alloc>, Type> { };
/gem5/src/dev/alpha/
H A D	tsunami_io.cc	41 #include <deque>
H A D	tsunami_pchip.cc	37 #include <deque>
/gem5/src/cpu/o3/
H A D	rename.hh	88 // A deque is used to queue the instructions. Barrier insts must 90 // using a deque instead of a queue. (Most other stages use a 92 typedef std::deque<DynInstPtr> InstQueue;
H A D	fetch.hh	515 std::deque<DynInstPtr> fetchQueue[Impl::MaxThreads];
/gem5/ext/googletest/googletest/test/
H A D	gtest-printers_test.cc	42 #include <deque> 195 using ::std::deque; 805 deque<char> empty; 810 deque<int> non_empty;
/gem5/src/cpu/minor/
H A D	buffers.hh	402 std::deque<ElemType> queue;

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Indexes created Thu Sep 26 06:36:22 EDT 2019