/gem5/src/cpu/pred/ |
H A D | multiperspective_perceptron.hh | 290 int local_history_length, int assoc, 322 void insertRecency(unsigned int pc, int assoc) { argument 324 for (i = 0; i < assoc; i += 1) { 329 if (i == assoc) { 330 i = assoc-1; 357 int assoc; member in class:MultiperspectivePerceptron 661 if (mpp.assoc < p1) { 662 mpp.assoc = p1; 968 if (mpp.assoc < p1) { 969 mpp.assoc [all...] |
H A D | multiperspective_perceptron.cc | 53 int n_local_histories, int local_history_length, int assoc, 68 recency_stack(assoc), last_ghist_bit(false), occupancy(0) 125 doing_recency(false), assoc(0), ghist_length(p->initial_ghist_length), 162 p->local_history_length, assoc, 193 totalbits += doing_recency ? (assoc * 16) : 0; 794 threadData[tid]->insertRecency(bi->getPC2(), assoc); 52 ThreadData(int num_filters, int n_local_histories, int local_history_length, int assoc, const std::vector<std::vector<int>> &blurrypath_bits, int path_length, int ghist_length, int block_size, const std::vector<std::vector<std::vector<bool>>> &acyclic_bits, const std::vector<int> &modhist_indices, const std::vector<int> &modhist_lengths, const std::vector<int> &modpath_indices, const std::vector<int> &modpath_lengths, const std::vector<int> &table_sizes, int n_sign_bits) argument
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H A D | multiperspective_perceptron_tage.cc | 480 threadData[tid]->insertRecency(recency_pc, assoc);
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/gem5/configs/ruby/ |
H A D | MOESI_CMP_token.py | 88 assoc = options.l1i_assoc, 91 assoc = options.l1d_assoc, 157 assoc = options.l2_assoc,
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H A D | MI_example.py | 74 assoc = options.l1d_assoc,
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/gem5/src/gpu-compute/ |
H A D | gpu_tlb.cc | 69 assoc = p->assoc; 70 assert(assoc <= size); 71 numSets = size/assoc; 83 for (int way = 0; way < assoc; ++way) { 84 int x = set * assoc + way; 89 FA = (size == assoc); 104 if (maxCoalescedReqs > assoc) { 105 maxCoalescedReqs = assoc; 106 cprintf("Forcing maxCoalescedReqs to %d (TLB assoc [all...] |
H A D | gpu_tlb.hh | 136 int assoc; member in class:X86ISA::GpuTLB
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/gem5/ext/mcpat/cacti/ |
H A D | io.cc | 93 sscanf(line, "-associativity %d", &(assoc)); 497 cout << "Associativity : " << assoc << endl; 743 g_ip->assoc = associativity; 933 g_ip->assoc = associativity; 1139 // if (pure_ram==true && assoc!=1) 1141 // cerr << "Pure RAM must have assoc as 1" << endl; 1145 //fully assoc and cam check 1146 if (is_cache && assoc == 0) 1151 if (pure_cam == true && assoc != 0) { 1154 << assoc << end [all...] |
H A D | nuca.cc | 203 if (g_ip->assoc > 2) { 205 while (i != g_ip->assoc) {
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H A D | cacti_interface.h | 130 unsigned int assoc; member in class:InputParameter
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/gem5/ext/mcpat/ |
H A D | core.cc | 61 int idx, tag, data, size, line, assoc, banks; local 99 interface_ip.assoc = core_params.instruction_buffer_assoc; 141 assoc = inst_fetch_params.btb_assoc; 143 idx = int(ceil(log2(size / line / assoc))); 149 interface_ip.assoc = assoc; 232 ASSIGN_INT_IF("assoc", inst_fetch_params.btb_assoc); 273 errorNonPositiveParam("assoc"); 318 interface_ip.assoc = branch_pred_params.assoc; [all...] |
H A D | array.cc | 153 area_efficiency_threshold && l_ip.assoc == 0)) { 182 if (l_ip.assoc > 0) {
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H A D | memoryctrl.cc | 340 interface_ip.assoc = mcp.reorder_buffer_assoc; 394 interface_ip.assoc = mcp.read_buffer_assoc; 435 interface_ip.assoc = mcp.write_buffer_assoc;
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H A D | core.h | 50 int assoc; member in class:BranchPredictorParameters
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H A D | system.cc | 323 interface_ip.assoc = 1;
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/gem5/configs/common/ |
H A D | GPUTLBConfig.py | 47 assoc = options.L%(level)dTLBassoc, \
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/gem5/configs/common/cores/arm/ |
H A D | HPI.py | 1350 assoc = 8 variable in class:HPI_WalkCache 1373 assoc = 2 variable in class:HPI_ICache 1383 assoc = 4 variable in class:HPI_DCache 1396 assoc = 16 variable in class:HPI_L2
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/gem5/configs/dram/ |
H A D | lat_mem_rd.py | 269 assoc = 16 variable in class:L3Cache
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/gem5/configs/learning_gem5/part3/ |
H A D | msi_caches.py | 139 assoc = 8,
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H A D | ruby_caches_MI_example.py | 136 assoc = 8,
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/gem5/src/mem/cache/tags/ |
H A D | sector_tags.cc | 51 : BaseTags(p), allocAssoc(p->assoc),
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/gem5/ext/ply/ply/ |
H A D | yacc.py | 1360 # Sets the precedence for a given terminal. assoc is the associativity such as 1365 def set_precedence(self,term,assoc,level): 1369 if assoc not in ['left','right','nonassoc']: 1371 self.Precedence[term] = (assoc,level) 2473 # - if precedence of reduce is same and left assoc, we reduce. 2941 self.log.error("Malformed precedence entry %s. Must be (assoc, term, ..., term)",p) 2944 assoc = p[0] 2945 if not isinstance(assoc,str): 2954 preclist.append((term,assoc,level+1)) 3111 for term, assoc, leve [all...] |
/gem5/src/mem/ruby/structures/ |
H A D | CacheMemory.cc | 66 m_cache_assoc = p->assoc;
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