/gem5/src/cpu/checker/ |
H A D | cpu.cc | 144 CheckerCPU::genMemFragmentRequest(Addr frag_addr, int size, 151 (Addr) size_left); 177 CheckerCPU::readMem(Addr addr, uint8_t *data, unsigned size, 184 Addr pAddr = 0x0; 186 Addr frag_addr = addr; 260 Addr addr, Request::Flags flags, uint64_t *res, 268 Addr pAddr = 0x0; 271 Addr frag_addr = addr; 360 Addr 361 CheckerCPU::dbg_vtophys(Addr add [all...] |
/gem5/src/arch/arm/ |
H A D | pagetable.hh | 57 VAddr(Addr a) { panic("not implemented yet."); } 103 Addr pfn; 104 Addr size; // Size of this entry, == Type of TLB Rec 105 Addr vpn; // Virtual Page Number 150 TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr, 181 updateVaddr(Addr new_vaddr) 186 Addr 193 match(Addr v [all...] |
/gem5/src/mem/ruby/system/ |
H A D | GPUCoalescer.hh | 111 void writeCallback(Addr address, DataBlock& data); 113 void writeCallback(Addr address, 117 void writeCallback(Addr address, 125 void writeCallback(Addr address, 132 void readCallback(Addr address, DataBlock& data); 134 void readCallback(Addr address, 138 void readCallback(Addr address, 145 void readCallback(Addr address, 154 void atomicCallback(Addr address, 181 void checkCoherence(Addr addres [all...] |
/gem5/src/arch/arm/insts/ |
H A D | pred_inst.cc | 48 PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 65 PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 79 DataImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 88 DataRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 97 DataRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 106 PredMacroOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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H A D | data64.cc | 46 DataXImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 55 DataXImmOnlyOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 65 DataXSRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 74 DataXERegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 83 DataX1RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 94 DataX1RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 106 DataX1Reg2ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 118 DataX2RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 131 DataX2RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 145 DataX3RegOp::generateDisassembly(Addr p [all...] |
/gem5/src/cpu/ |
H A D | pc_event.cc | 93 Addr pc = tc->instAddr(); 126 PCEventQueue::equal_range(Addr pc) 131 BreakPCEvent::BreakPCEvent(PCEventQueue *q, const std::string &desc, Addr addr, 148 sched_break_pc_sys(System *sys, Addr addr) 154 sched_break_pc(Addr addr) 163 PanicPCEvent::PanicPCEvent(PCEventQueue *q, const std::string &desc, Addr pc)
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H A D | profile.cc | 63 Addr addr = i->first; 102 FunctionProfile::consume(const vector<Addr> &stack) 127 map<Addr, Counter>::const_iterator i, end = pc_count.end(); 129 Addr pc = i->first; 146 FunctionProfile::sample(ProfileNode *node, Addr pc) 150 Addr symaddr;
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | dram_gen.cc | 54 Addr start_addr, Addr end_addr, 55 Addr _blocksize, Addr cacheline_size, 57 uint8_t read_percent, Addr data_limit, 157 addr = random_mt.random<Addr>(startAddr, endAddr - 1);
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H A D | base.cc | 373 Addr start_addr, Addr end_addr, Addr blocksize, 375 uint8_t read_percent, Addr data_limit) 387 Addr start_addr, Addr end_addr, Addr blocksize, 389 uint8_t read_percent, Addr data_limit) 401 Addr start_addr, Addr end_add [all...] |
/gem5/src/cpu/pred/ |
H A D | tage.cc | 56 TAGE::update(ThreadID tid, Addr branch_pc, bool taken, void* bp_history, 57 bool squashed, const StaticInstPtr & inst, Addr corrTarget) 97 TAGE::predict(ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) 105 TAGE::lookup(ThreadID tid, Addr branch_pc, void* &bp_history) 119 TAGE::btbUpdate(ThreadID tid, Addr branch_pc, void* &bp_history) 126 TAGE::uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history)
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/gem5/src/mem/cache/prefetch/ |
H A D | delta_correlating_prediction_tables.cc | 57 DeltaCorrelatingPredictionTables::DCPTEntry::addAddress(Addr address, 61 Addr delta = address - lastAddress; 63 Addr max_positive_delta = (1 << (delta_bits-1)) - 1; 99 // remaining deltas (adding each delta to the last Addr to generate the 111 Addr addr = lastAddress; 134 Addr address = pfi.getAddr(); 135 Addr pc = pfi.getPC();
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H A D | sbooe.cc | 57 SBOOEPrefetcher::Sandbox::insert(Addr addr, Tick tick) 71 SBOOEPrefetcher::access(Addr access_line) 127 const Addr pfi_addr = pfi.getAddr(); 128 const Addr pfi_line = pfi_addr >> lBlkSize; 133 demandAddresses.insert(std::pair<Addr, Tick>(pfi_addr, curTick())); 139 Addr pref_line = pfi_line + bestSandbox->stride;
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/gem5/src/arch/alpha/ |
H A D | system.cc | 103 Addr addr = 0; 187 Addr 188 AlphaSystem::fixFuncEventAddr(Addr addr) 202 Addr new_addr = addr + 2 * sizeof(MachInst); 211 AlphaSystem::setAlphaAccess(Addr access) 213 Addr addr = 0;
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H A D | decoder.hh | 67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 100 decode(ExtMachInst mach_inst, Addr addr)
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/gem5/src/mem/ |
H A D | abstract_mem.hh | 71 static const Addr Addr_Mask = 0xf; 76 Addr addr; 81 static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 96 LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid) 277 Addr start() const { return range.start(); }
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H A D | addr_mapper.hh | 80 virtual Addr remapAddr(Addr addr) const = 0; 92 AddrMapperSenderState(Addr _origAddr) : origAddr(_origAddr) 99 Addr origAddr; 267 Addr remapAddr(Addr addr) const;
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H A D | se_translating_port_proxy.cc | 70 SETranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const 76 Addr paddr; 90 SETranslatingPortProxy::tryWriteBlob(Addr addr, const void *p, int size) const 96 Addr paddr; 122 SETranslatingPortProxy::tryMemsetBlob(Addr addr, uint8_t val, int size) const 125 Addr paddr;
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H A D | mem_checker.hh | 207 ByteTracker(Addr addr = 0, const MemChecker *parent = NULL) 391 Serial startRead(Tick start, Addr addr, size_t size); 403 Serial startWrite(Tick start, Addr addr, size_t size, const uint8_t *data); 419 Addr addr, size_t size, uint8_t *data); 431 void completeWrite(Serial serial, Tick complete, Addr addr, size_t size); 441 void abortWrite(Serial serial, Addr addr, size_t size); 463 void reset(Addr addr, size_t size); 480 ByteTracker* getByteTracker(Addr addr) 513 std::unordered_map<Addr, ByteTracker> byte_trackers; 517 MemChecker::startRead(Tick start, Addr add [all...] |
/gem5/src/cpu/simple/ |
H A D | atomic.hh | 150 Addr cacheBlockMask; 214 bool genMemFragmentRequest(const RequestPtr& req, Addr frag_addr, 219 Fault readMem(Addr addr, uint8_t *data, unsigned size, 225 Addr addr, Request::Flags flags, uint64_t *res, 229 Fault amoMem(Addr addr, uint8_t* data, unsigned size, 238 void printAddr(Addr a);
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/gem5/src/dev/net/ |
H A D | i8254xGBe.hh | 217 virtual Addr descBase() const = 0; 256 Addr wbAlignment; 262 Addr pciToDma(Addr a) { return igbe->pciToDma(a); } 280 void writeback(Addr aMask); 341 Addr descBase() const override { return igbe->regs.rdba(); } 402 Addr descBase() const override { return igbe->regs.tdba(); } 420 Addr completionAddress; 427 Addr tsoHeaderLen; 428 Addr tsoMs [all...] |
/gem5/src/base/ |
H A D | remote_gdb.hh | 217 bool read(Addr addr, size_t size, char *data); 218 bool write(Addr addr, size_t size, const char *data); 220 template <class T> T read(Addr addr); 221 template <class T> void write(Addr addr, T data); 236 void insertSoftBreak(Addr addr, size_t len); 237 void removeSoftBreak(Addr addr, size_t len); 238 void insertHardBreak(Addr addr, size_t len); 239 void removeHardBreak(Addr addr, size_t len); 241 void clearTempBreakpoint(Addr &bkpt); 242 void setTempBreakpoint(Addr bkp [all...] |
/gem5/src/dev/ |
H A D | dma_device.hh | 99 const Addr totBytes; 102 Addr numBytes; 107 DmaReqState(Event *ce, Addr tb, Tick _delay) 156 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, 160 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, 179 void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, 186 void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, 192 void dmaRead(Addr addr, int size, Event *event, uint8_t *data, 199 void dmaRead(Addr addr, int size, Event *event, uint8_t *data, 408 void startFill(Addr star [all...] |
/gem5/src/arch/power/ |
H A D | decoder.hh | 68 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 107 decode(ExtMachInst mach_inst, Addr addr)
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/gem5/src/dev/arm/ |
H A D | gic_v2m.hh | 65 const Addr addr; 118 int frameFromAddr(Addr a) const;
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/gem5/src/mem/ruby/profiler/ |
H A D | StoreTrace.hh | 42 explicit StoreTrace(Addr addr); 63 Addr m_addr;
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