Searched hist:2011 (Results 776 - 800 of 897) sorted by relevance

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/gem5/src/sim/
H A Dprocess.cc8794:e2ac2b7164dd Fri Nov 18 05:20:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of includes of config/full_system.hh.
8784:05fb20d7064b Wed Nov 02 05:11:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in sim.
8766:b0773af78423 Sun Oct 30 03:32:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Build the base process class in FS.
8633:91be9d7942c7 Thu Dec 01 03:15:00 EST 2011 Ali Saidi <Ali.Saidi@ARM.com> SE: Don't warn when not extending stack as it's too noisy with O3.
8601:af28085882dc Sun Oct 23 01:30:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> SE: move page allocation from PageTable to Process

PageTable supported an allocate() call that called back
through the Process to allocate memory, but did not have
a method to map addresses without allocating new pages.
It makes more sense for Process to do the allocation, so
this method was renamed allocateMem() and moved to Process,
and uses a new map() call on PageTable.

The remaining uses of the process pointer in PageTable
were only to get the name and the PID, so by passing these
in directly in the constructor, we can make PageTable
completely independent of Process.
8539:7d3ea3c65c66 Fri Sep 09 04:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> Stack: Tidy up some comments, a warning, and make stack extension consistent.

Do some minor cleanup of some recently added comments, a warning, and change
other instances of stack extension to be like what's now being done for x86.
8534:09745e0c3dd9 Fri Sep 02 20:04:00 EDT 2011 Lisa Hsu <Lisa.Hsu@amd.com> TLB: comments and a helpful warning.

Nothing big here, but when you have an address that is not in the page table request to be allocated, if it falls outside of the maximum stack range all you get is a page fault and you don't know why. Add a little warn() to explain it a bit. Also add some comments and alter logic a little so that you don't totally ignore the return value of checkAndAllocNextPage().
8324:aa7a67647c7b Mon May 23 17:29:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> syscall emul: fix Power Linux mmap constant, plus other cleanup

We were getting a spurious warning in the regressions that turned
out to be due to having the wrong value for TGT_MAP_ANONYMOUS for
Power Linux, but in the process of tracking it down I ended up
doing some cleanup of the mmap handling in general.
8240:38befb82b2c9 Tue Apr 19 21:45:00 EDT 2011 Nathan Binkert <nate@binkert.org> stats: rename stats so they can be used as python expressions
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
H A Dserialize.hh8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
7948:20da8e9ed59f Fri Feb 11 19:29:00 EST 2011 Ali Saidi <Ali.Saidi@ARM.com> Serialization: Allow serialization of stl lists
7823:dac01f14f20f Sat Jan 08 00:50:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
/gem5/src/cpu/
H A Dbase.cc8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8779:2a590c51adb1 Tue Nov 01 07:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Expose the same methods on the CPUs in SE and FS modes.
8745:575cab0db076 Sun Oct 09 03:15:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Build the Interrupt objects in SE mode.
8634:8390f2d80227 Thu Dec 01 03:15:00 EST 2011 Chris Emmons <chris.emmons@arm.com> Output: Add hierarchical output support and cleanup existing codebase.
8607:5fb918115c07 Mon Oct 31 04:09:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> GCC: Get everything working with gcc 4.6.1.

And by "everything" I mean all the quick regressions.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
7914:eee5bb0fb8ea Mon Feb 07 01:14:00 EST 2011 Brad Beckmann <Brad.Beckmann@amd.com> m5: added work completed monitoring support
7897:d9e8b1fd1a9f Mon Feb 07 01:14:00 EST 2011 Joel Hestness <hestness@cs.utexas.edu> mcpat: Adds McPAT performance counters

Updated patches from Rick Strong's set that modify performance counters for
McPAT
7823:dac01f14f20f Sat Jan 08 00:50:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
H A Dexec_context.hh8779:2a590c51adb1 Tue Nov 01 07:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Expose the same methods on the CPUs in SE and FS modes.
8444:56de1f9320df Sun Jul 03 01:35:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.

readBytes and writeBytes had the word "bytes" in their names because they
accessed blobs of bytes. This distinguished them from the read and write
functions which handled higher level data types. Because those functions don't
exist any more, this change renames readBytes and writeBytes to more general
names, readMem and writeMem, which reflect the fact that they are how you read
and write memory. This also makes their names more consistent with the
register reading/writing functions, although those are still read and set for
some reason.
8443:530ff1bc8d70 Sun Jul 03 01:34:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> ExecContext: Get rid of the now unused read/write templated functions.
/gem5/src/cpu/simple/
H A Datomic.cc8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8779:2a590c51adb1 Tue Nov 01 07:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Expose the same methods on the CPUs in SE and FS modes.
8444:56de1f9320df Sun Jul 03 01:35:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.

readBytes and writeBytes had the word "bytes" in their names because they
accessed blobs of bytes. This distinguished them from the read and write
functions which handled higher level data types. Because those functions don't
exist any more, this change renames readBytes and writeBytes to more general
names, readMem and writeMem, which reflect the fact that they are how you read
and write memory. This also makes their names more consistent with the
register reading/writing functions, although those are still read and set for
some reason.
8443:530ff1bc8d70 Sun Jul 03 01:34:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> ExecContext: Get rid of the now unused read/write templated functions.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
8143:b0b94a7b7c1f Thu Mar 17 20:20:00 EDT 2011 Ali Saidi <Ali.Saidi@ARM.com> ARM: Detect and skip udelay() functions in linux kernel.

This change speeds up booting, especially in MP cases, by not executing
udelay() on the core but instead skipping ahead tha amount of time that is being
delayed.
8105:906864dd0937 Wed Mar 02 02:18:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Spelling: Fix the a spelling error by changing mmaped to mmapped.

There may not be a formally correct spelling for the past tense of mmap, but
mmapped is the spelling Google doesn't try to autocorrect. This makes sense
because it mirrors the past tense of map->mapped and not the past tense of
cape->caped.
7897:d9e8b1fd1a9f Mon Feb 07 01:14:00 EST 2011 Joel Hestness <hestness@cs.utexas.edu> mcpat: Adds McPAT performance counters

Updated patches from Rick Strong's set that modify performance counters for
McPAT
7823:dac01f14f20f Sat Jan 08 00:50:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
H A Dbase.hh8779:2a590c51adb1 Tue Nov 01 07:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Expose the same methods on the CPUs in SE and FS modes.
8557:f44572edfba3 Mon Sep 19 05:46:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> Syscall: Make the syscall function available in both SE and FS modes.

In FS mode the syscall function will panic, but the interface will be
consistent and code which calls syscall can be compiled in. This will allow,
for instance, instructions that use syscall to be built unconditionally but
then not returned by the decoder.
8541:27aaee8ec7cc Fri Sep 09 05:30:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> Decode: Pull instruction decoding out of the StaticInst class into its own.

This change pulls the instruction decoding machinery (including caches) out of
the StaticInst class and puts it into its own class. This has a few intrinsic
benefits. First, the StaticInst code, which has gotten to be quite large, gets
simpler. Second, the code that handles decode caching is now separated out
into its own component and can be looked at in isolation, making it easier to
understand. I took the opportunity to restructure the code a bit which will
hopefully also help.

Beyond that, this change also lays some ground work for each ISA to have its
own, potentially stateful decode object. We'd be able to include less
contextualizing information in the ExtMachInst objects since that context
would be applied at the decoder. Also, the decoder could "know" ahead of time
that all the instructions it's going to see are going to be, for instance, 64
bit mode, and it will have one less thing to check when it decodes them.
Because the decode caching mechanism has been separated out, it's now possible
to have multiple caches which correspond to different types of decoding
context. Having one cache for each element of the cross product of different
configurations may become prohibitive, so it may be desirable to clear out the
cache when relatively static state changes and not to have one for each
setting.

Because the decode function is no longer universally accessible as a static
member of the StaticInst class, a new function was added to the ThreadContexts
that returns the applicable decode object.
8276:66bb0d8ae8bf Wed May 04 21:38:00 EDT 2011 Ali Saidi <Ali.Saidi@ARM.com> CPU: Fix a case where timing simple cpu faults can nest.

If we fault, change the state to faulting so that we don't fault again in the same cycle.
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
7897:d9e8b1fd1a9f Mon Feb 07 01:14:00 EST 2011 Joel Hestness <hestness@cs.utexas.edu> mcpat: Adds McPAT performance counters

Updated patches from Rick Strong's set that modify performance counters for
McPAT
/gem5/src/cpu/o3/
H A Dcpu.cc8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8779:2a590c51adb1 Tue Nov 01 07:01:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Expose the same methods on the CPUs in SE and FS modes.
8777:dd43f1c9fa0a Mon Oct 31 05:58:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make the functions available from the TC consistent between SE and FS.
8766:b0773af78423 Sun Oct 30 03:32:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Build the base process class in FS.
8627:86358c187837 Thu Dec 01 03:15:00 EST 2011 Ali Saidi <Ali.Saidi@ARM.com> O3: Add stat that counts how many cycles the O3 cpu was quiesced.
8607:5fb918115c07 Mon Oct 31 04:09:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> GCC: Get everything working with gcc 4.6.1.

And by "everything" I mean all the quick regressions.
8491:606cf2660887 Sun Aug 07 18:41:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> O3: Get rid of the unused addToRemoveList function.
8460:3893d9d2c6c2 Sun Jul 10 01:56:00 EDT 2011 Ali Saidi <Ali.Saidi@ARM.com> O3: Make sure fetch doesn't go off into the weeds during speculation.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
H A Dthread_state.hh8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8777:dd43f1c9fa0a Mon Oct 31 05:58:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make the functions available from the TC consistent between SE and FS.
8766:b0773af78423 Sun Oct 30 03:32:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Build the base process class in FS.
H A Dregfile.hh8794:e2ac2b7164dd Fri Nov 18 05:20:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of includes of config/full_system.hh.
8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
H A DSConscript8335:9228e00459d4 Thu Jun 02 20:36:00 EDT 2011 Nathan Binkert <nate@binkert.org> scons: rename TraceFlags to DebugFlags
/gem5/src/mem/cache/
H A Dbase.hh8794:e2ac2b7164dd Fri Nov 18 05:20:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of includes of config/full_system.hh.
8786:8be24baf68b8 Mon Nov 07 04:13:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in mem.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
8134:b01a51ff05fa Thu Mar 17 20:20:00 EDT 2011 Ali Saidi <Ali.Saidi@ARM.com> Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.

This change fixes the problem for all the cases we actively use. If you want to try
more creative I/O device attachments (E.g. sharing an L2), this won't work. You
would need another level of caching between the I/O device and the cache
(which you actually need anyway with our current code to make sure writes
propagate). This is required so that you can mark the cache in between as
top level and it won't try to send ownership of a block to the I/O device.
Asserts have been added that should catch any issues.
7823:dac01f14f20f Sat Jan 08 00:50:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
/gem5/src/python/m5/
H A DSimObject.py8597:45c9f664a365 Thu Oct 20 16:09:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> SimObject: add export_method* hooks to export C++ methods to Python

Replace the (broken as of previous changeset) swig_objdecl() method
that allowed/forced you to substitute a whole new C++ struct
definition for SWIG to wrap with a set of export_method* hooks
that let you just declare a set of C++ methods (or other declarations)
that get inserted in the auto-generated struct.

Restore the System get/setMemoryMode methods, and use this mechanism
to specialize SimObject as well, eliminating teh need for sim_object.i.
Needed bits of sim_object.i are moved to the new pyobject.i.
Also sucked a little SimObject specialization into cxx_param_decl()
allowing us to get rid of src/sim/sim_object_params.hh. Now the
generation and wrapping of the base SimObject param struct is more
in line with how derived objects are handled.
8596:e6e22fa77883 Thu Oct 20 16:08:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> scons/swig: refactor some of the scons/SWIG code

- Move the random bits of SWIG code generation out of src/SConscript
file and into methods on the objects being wrapped.
- Cleaned up some variable naming and added some comments to make
the process a little clearer.
- Did a little generated file/module renaming:
- vptype_Foo now Foo_vector
- init_Foo is now Foo_init
This makes it easier to see all the Foo-related files in a
sorted directory listing.
- Made cxx_predecls and swig_predecls normal SimObject classmethods.
- Got rid of swig_objdecls hook, even though this breaks the System
objects get/setMemoryMode method exports. Will be fixing this in
a future changeset.
8459:b8c3c20d0385 Sun Jul 10 01:56:00 EDT 2011 Ali Saidi <Ali.Saidi@ARM.com> Config: Add support for a Self.all proxy object
8331:aa00cee9abb1 Thu Jun 02 00:43:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> SimObject: allow modules in subclass definitions

In particular, this avoids crashing when you do
an import (like "import pdb") inside a SimObject
subclass definition.
8321:9f34cf472451 Mon May 23 17:29:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> config: reinstate implicit parenting on parameter assignment
Last summer's big rewrite of the initialization code (in
particular cset 6efc3672733b) got rid of the implicit parenting
that used to occur when an unparented SimObject was assigned as
a parameter value to another SimObject. The idea was that the
new adoptOrphanParams() step would catch these anyway so it was
unnecessary.

Unfortunately it turns out that adoptOrphanParams() has some
inherent instability in that the parent that does the adoption
depends on the config tree traversal order. Even making this
order deterministic (e.g., by traversing children in
alphabetical order) can introduce unwanted and unexpected
hierarchy changes between similar configs (e.g., when adding a
switch_cpu in place of a cpu), causing problems when trying to
restore checkpoints across similar configs. The hierarchy
created by implicit parenting is more stable and more
controllable, so this patch turns that behavior back on.

This patch also cleans up some long-standing holes regarding
parenting of SimObjects that are created in class definitions
(either in the body of the class, or as default parameters).

To avoid breaking some existing config files, this necessitated
changing the error on reparenting children to a warning. This
change fixes another bug where attempting to print the prior
error message would fail on reparenting SimObjectVectors
because they lack a _parent attribute. Some further issues
with SimObjectVectors were cleaned up by getting rid of the
get_parent() call (which could cause errors with some
SimObjectVectors where there was no single parent to return)
with has_parent() (since all the uses of get_parent() were just
boolean tests anyway).

Finally, since the adoptOrphanParam() step turned out to be so
problematic, we now issue a warning when it actually has to do
an adoption. Future cleanup of config files will get rid of
current warnings.
7811:a8fc35183c10 Mon Jan 03 17:35:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Make commenting on close namespace brackets consistent.

Ran all the source files through 'perl -pi' with this script:

s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|;
s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|;
s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|;

Also did a little manual editing on some of the arch/*/isa_traits.hh files
and src/SConscript.
/gem5/configs/common/
H A DSimulation.py8318:3f37cc5d25bc Mon May 23 14:36:00 EDT 2011 Korey Sewell <ksewell@umich.edu> configs: missed spot progress-interval change
8311:7b42aba8e5f2 Fri May 20 14:49:00 EDT 2011 Korey Sewell <ksewell@umich.edu> configs: cleanup redundant/unused options
maxinsts & max_inst redundant
prog_intvl and profile seem redundant, but profile looks to be unused
add -p option for progress intervals
8211:5275c2fbe957 Mon Apr 04 12:42:00 EDT 2011 Anthony Gutierrez <atgutier@umich.edu> Sim: Fix Simulation.py to allow more than 1 core for standard switching.

This patch moves the assignment of testsys.switch_cpus, testsys.switch_cpus_1,
switch_cpu_list, and switch_cpu_list1 outside of the for loop so they are
assigned only once, after switch_cpus and switch_cpus_1 are constructed.
/gem5/src/arch/alpha/
H A Dprocess.cc8601:af28085882dc Sun Oct 23 01:30:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> SE: move page allocation from PageTable to Process

PageTable supported an allocate() call that called back
through the Process to allocate memory, but did not have
a method to map addresses without allocating new pages.
It makes more sense for Process to do the allocation, so
this method was renamed allocateMem() and moved to Process,
and uses a new map() call on PageTable.

The remaining uses of the process pointer in PageTable
were only to get the name and the PID, so by passing these
in directly in the constructor, we can make PageTable
completely independent of Process.
8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
H A Dvtophys.cc8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
/gem5/src/cpu/checker/
H A Dcpu.cc8793:5f25086326ac Fri Nov 18 04:33:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
7823:dac01f14f20f Sat Jan 08 00:50:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
/gem5/src/dev/
H A Dio_device.hh8742:9df38d259935 Tue Oct 04 05:26:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> SE/FS: Put platform pointers in fewer objects.

Not all objects need a platform pointer, and having one creates a dependence
on their being a platform object. This change removes the platform pointer to
from the base device object and moves it into subclasses that actually need
it.
8630:05580a8506c7 Thu Dec 01 03:15:00 EST 2011 Mitchell Hayenga <Mitchell.Hayenga@ARM.com> Device: Make changes necessary to support a coherent page walker cache.

Adds the flag 'recvSnoops' which enables pagewalkers using DmaPorts,
to properly configure snoops.
8598:c7fec2cb91cb Thu Oct 20 16:11:00 EDT 2011 Steve Reinhardt <steve.reinhardt@amd.com> dev: clean up PioDevice and DmaDevive getPort() methods.

Make DmaDevice::getPort() call PioDevice::getPort() instead
of just copying and pasting the code.

Also move definitions from .hh to .cc file.
H A Dplatform.cc8066:cb7bf3919bdd Wed Feb 23 16:10:00 EST 2011 Ali Saidi <Ali.Saidi@ARM.com> Includes: Don't include isa_traits.hh and use the TheISA namespace unless really needed.
/gem5/tests/configs/
H A Dsimple-atomic.py7876:189b9b258779 Thu Feb 03 23:23:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Config: Keep track of uncached and cached ports separately.

This makes sure that the address ranges requested for caches and uncached ports
don't conflict with each other, and that accesses which are always uncached
(message signaled interrupts for instance) don't waste time passing through
caches.
H A Do3-timing-ruby.py7876:189b9b258779 Thu Feb 03 23:23:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Config: Keep track of uncached and cached ports separately.

This makes sure that the address ranges requested for caches and uncached ports
don't conflict with each other, and that accesses which are always uncached
(message signaled interrupts for instance) don't waste time passing through
caches.
/gem5/system/alpha/console/
H A Dconsole.c8029:442f90a944eb Wed Feb 16 01:34:00 EST 2011 Nathan Binkert <nate@binkert.org> copyright: update copyright on alpha system files
/gem5/src/arch/x86/insts/
H A Dstatic_inst.hh8232:b28d06a175be Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
/gem5/src/arch/x86/isa/microops/
H A Dspecop.isa8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
/gem5/src/base/
H A Dpollevent.cc8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
/gem5/ext/libelf/
H A DSConscript8349:931ef19535e0 Mon Jun 13 02:51:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> LibElf: Build the error management code in libelf.

This change makes some minor changes to get the error management code in
libelf to build on Linux and to build it into the library.

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