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/gem5/configs/boot/
H A Dnetperf-stream-udp-local.rcS4418:aaa5828991b3 Mon Apr 30 13:08:00 EDT 2007 Ali Saidi <saidi@eecs.umich.edu> add a udp stream benchmark and a udp loopback benchmark
/gem5/src/dev/i2c/
H A DSConscript11265:1bdbdd6ae348 Thu Dec 10 13:46:00 EST 2015 Andreas Sandberg <andreas.sandberg@arm.com> dev: Add missing SConscript in src/dev/i2c
/gem5/src/dev/mips/
H A DconsoleCONSOLE PANIC (looping): A A Bootcode begins ... M5 console: m5MipsAccess @ 0x% ... 5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Dmaltareg.h5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Daccess.h5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
/gem5/src/arch/mips/linux/
H A Daligned.hh5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Dhwrpb.hh5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Dthread_info.hh5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Dsystem.hh10280:5b67e1bdf6ad Wed Aug 13 06:57:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> mips: Remove unused private members to fix compile-time warning

Certain versions of clang complain about unused private members if
they are not used. This changeset removes such members from the
MIPS-specific classes to silence the warning.
5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
/gem5/src/mem/ruby/common/
H A DBoolVec.cc11208:fa3e56b6e0b6 Fri Nov 13 17:30:00 EST 2015 Joe Gross <joseph.gross@amd.com> ruby: add BoolVec

The BoolVec typedef and insertion operator overload function simplify usage of
vectors of type bool
/gem5/src/arch/x86/
H A Dmicrocode_rom.hh8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
7966:0dff1ff293d0 Sun Feb 13 20:42:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> X86: On a bad microopc, return a microop that returns a fault that panics.

This way a bad micropc will have to get all the way to commit before killing
the simulation. This accounts for misspeculated branches.
/gem5/src/unittest/
H A Dcprintftime.cc8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
/gem5/src/arch/mips/
H A Didle_event.hh5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/
H A Dshift.py6481:fa6d324aa2f9 Fri Aug 07 13:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: (Re)Implemented SHRD.
6481:fa6d324aa2f9 Fri Aug 07 13:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: (Re)Implemented SHRD.
6480:ed9d773de88f Fri Aug 07 13:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement SHLD.
6480:ed9d773de88f Fri Aug 07 13:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement SHLD.
/gem5/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/
H A Dsimerr9851:14e6caa5a1de Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> tests: Move ISA-independent tests to the NULL ISA

This patch simply takes a first step to use the NULL ISA build for
tests that do not make use of a CPU. Most of the Ruby tests could go
the same way, but to avoid duplicating a lot of compilation targets
that will have to wait until Ruby is built as a library and linked in
independently.
/gem5/util/statetrace/arch/amd64/
H A Dtracechild.hh8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
/gem5/util/statetrace/arch/sparc/
H A Dtracechild.hh8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
/gem5/util/statetrace/base/
H A Dregstate.hh8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes
/gem5/system/arm/dt/platforms/
H A Dvexpress_gem5_v2.dtsi13510:cf85dcc6767c Tue Nov 13 05:02:00 EST 2018 Jairo Balart <jairo.balart@metempsy.com> system-arm: Add device tree for new VExpress GEM5_V2 platform

Change-Id: Ifc2b91afe5b88a656b4ed1c64ab6cca97f082034
Reviewed-on: https://gem5-review.googlesource.com/c/14275
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/util/m5/
H A Djni_gem5Op.c11358:cd41493e8b7e Mon Feb 29 20:13:00 EST 2016 Prakash Ramrakhyani <prakash.ramrakhyani@arm.com> util: update Java JNI interface to m5ops

Synchronize with
ab19693da "pseudo inst,util: Add optional key to initparam pseudo instruction"
8547:5979b029bbb4 Tue Sep 13 01:06:00 EDT 2011 Prakash Ramrakhyani <prakash.ramrakhyani@arm.com> gem5ops: Implement Java JNI for gem5Ops

These ops allow gem5 ops to be called from within java programs like the following:
import jni.gem5Op;

public class HelloWorld {

public static void main(String[] args) {
gem5Op gem5 = new gem5Op();
System.out.println("Rpns0:" + gem5.rpns());
System.out.println("Rpns1:" + gem5.rpns());
}

static {
System.loadLibrary("gem5OpJni");
}
}

When building you need to make sure classpath include gem5OpJni.jar:
javac -classpath $CLASSPATH:/path/to/gem5OpJni.jar HelloWorld.java

and when running you need to make sure both the java and library path are set:
java -classpath $CLASSPATH:/path/to/gem5OpJni.jar -Djava.library.path=/path/to/libgem5OpJni.so HelloWorld
/gem5/util/m5/jni/
H A Dgem5Op.java11358:cd41493e8b7e Mon Feb 29 20:13:00 EST 2016 Prakash Ramrakhyani <prakash.ramrakhyani@arm.com> util: update Java JNI interface to m5ops

Synchronize with
ab19693da "pseudo inst,util: Add optional key to initparam pseudo instruction"
8547:5979b029bbb4 Tue Sep 13 01:06:00 EDT 2011 Prakash Ramrakhyani <prakash.ramrakhyani@arm.com> gem5ops: Implement Java JNI for gem5Ops

These ops allow gem5 ops to be called from within java programs like the following:
import jni.gem5Op;

public class HelloWorld {

public static void main(String[] args) {
gem5Op gem5 = new gem5Op();
System.out.println("Rpns0:" + gem5.rpns());
System.out.println("Rpns1:" + gem5.rpns());
}

static {
System.loadLibrary("gem5OpJni");
}
}

When building you need to make sure classpath include gem5OpJni.jar:
javac -classpath $CLASSPATH:/path/to/gem5OpJni.jar HelloWorld.java

and when running you need to make sure both the java and library path are set:
java -classpath $CLASSPATH:/path/to/gem5OpJni.jar -Djava.library.path=/path/to/libgem5OpJni.so HelloWorld
/gem5/src/arch/arm/freebsd/
H A Dfreebsd.hh11383:5ac090acd180 Thu Mar 17 13:24:00 EDT 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: extend mmap system call to support file backed mmaps

For O3, which has a stat that counts reg reads, there is an additional
reg read per mmap() call since there's an arg we no longer ignore.
Otherwise, stats should not be affected.
11381:516213d2f0cf Thu Mar 17 13:22:00 EDT 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: rename OpenFlagTransTable struct

The structure definition only had the open system call flag set in mind when
it was named, so we rename it here with the intention of using it to define
additional tables to translate flags for other system calls in the future.
/gem5/src/arch/power/
H A Dstacktrace.cc10279:faa9dfc465ef Wed Aug 13 06:57:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> power: Remove unused private members to fix compile-time warning

Certain versions of clang complain about unused private members if
they are not used. This changeset removes such members from the
POWER-specific ProcessInfo struct to silence the warning.
8792:1c0812bae427 Sun Nov 13 03:40:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Power: Add a stubbed out stacktrace.cc
/gem5/tests/quick/se/04.gpu/ref/x86/linux/gpu-ruby-GPU_RfO/
H A Dsimerr11958:baaa90eed7b3 Tue Mar 28 19:55:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update 04.gpu stats.

A new stat was added by the CL:

commit b043dcf58ad766582aeab162fb855cc3fc95f2cf
Author: Andreas Sandberg <andreas.sandberg@arm.com>
Date: Mon Feb 27 13:17:51 2017 +0000

gpu-compute: Fix Python/C++ object hierarchy discrepancies

Change-Id: I665a7eb0bea19f379c5fbaaf4686fcbe8c008159
Reviewed-on: https://gem5-review.googlesource.com/2654
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
11680:b4d943429dc6 Thu Oct 13 18:21:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update references
/gem5/src/cpu/
H A Dintr_control_noisa.cc9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL

This patch makes it possible to once again build gem5 without any
ISA. The main purpose is to enable work around the interconnect and
memory system without having to build any CPU models or device models.

The regress script is updated to include the NULL ISA target. Currently
no regressions make use of it, but all the testers could (and perhaps
should) transition to it.

Completed in 52 milliseconds

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