/gem5/src/arch/arm/insts/ |
H A D | branch.hh | 82 IntRegIndex op1; member in class:ArmISA::BranchReg 111 IntRegIndex op1; member in class:ArmISA::BranchRegReg 128 IntRegIndex op1; member in class:ArmISA::BranchImmReg
|
H A D | branch64.hh | 88 IntRegIndex op1; member in class:ArmISA::BranchReg64 130 IntRegIndex op1; member in class:ArmISA::BranchImmReg64 154 IntRegIndex op1; member in class:ArmISA::BranchImmImmReg64
|
H A D | misc64.hh | 64 IntRegIndex op1; member in class:RegRegImmImmOp64 83 IntRegIndex op1; member in class:RegRegRegImmOp64 174 IntRegIndex op1; member in class:MiscRegRegImmOp64 192 MiscRegIndex op1; member in class:RegMiscRegImmOp64
|
H A D | data64.hh | 51 IntRegIndex dest, op1; member in class:ArmISA::DataXImmOp 83 IntRegIndex dest, op1, op2; member in class:ArmISA::DataXSRegOp 102 IntRegIndex dest, op1, op2; member in class:ArmISA::DataXERegOp 121 IntRegIndex dest, op1; member in class:ArmISA::DataX1RegOp 135 IntRegIndex dest, op1; member in class:ArmISA::DataX1RegImmOp 151 IntRegIndex dest, op1; member in class:ArmISA::DataX1Reg2ImmOp 168 IntRegIndex dest, op1, op2; member in class:ArmISA::DataX2RegOp 183 IntRegIndex dest, op1, op2; member in class:ArmISA::DataX2RegImmOp 200 IntRegIndex dest, op1, op2, op3; member in class:ArmISA::DataX3RegOp 216 IntRegIndex op1; member in class:ArmISA::DataXCondCompImmOp 235 IntRegIndex op1, op2; member in class:ArmISA::DataXCondCompRegOp 253 IntRegIndex dest, op1, op2; member in class:ArmISA::DataXCondSelOp [all...] |
H A D | pred_inst.hh | 281 IntRegIndex dest, op1; member in class:ArmISA::DataImmOp 300 IntRegIndex dest, op1, op2; member in class:ArmISA::DataRegOp 319 IntRegIndex dest, op1, op2, shift; member in class:ArmISA::DataRegRegOp
|
H A D | misc.hh | 89 IntRegIndex op1; member in class:MsrRegOp 103 MiscRegIndex op1; member in class:MrrcOp 122 IntRegIndex op1; member in class:McrrOp 171 IntRegIndex op1; member in class:RegRegOp 187 IntRegIndex op1; member in class:RegImmRegOp 203 IntRegIndex op1; member in class:RegRegRegImmOp 222 IntRegIndex op1; member in class:RegRegRegRegOp 241 IntRegIndex op1; member in class:RegRegRegOp 258 IntRegIndex op1; member in class:RegRegImmOp 276 IntRegIndex op1; member in class:MiscRegRegImmOp 294 MiscRegIndex op1; member in class:RegMiscRegImmOp 329 IntRegIndex op1; member in class:RegRegImmImmOp 349 IntRegIndex op1; member in class:RegImmRegShiftOp [all...] |
H A D | static_inst.hh | 82 saturateOp(int32_t &res, int64_t op1, int64_t op2, bool sub=false) argument 115 uSaturateOp(uint32_t &res, int64_t op1, int64_t op2, bool sub=false) argument
|
H A D | macromem.hh | 134 RegIndex dest, op1; member in class:ArmISA::MicroNeonMixOp 165 RegIndex dest, op1; member in class:ArmISA::MicroNeonMixOp64 182 RegIndex dest, op1; member in class:ArmISA::MicroNeonMixLaneOp64
|
H A D | sve.hh | 91 IntRegIndex op1; member in class:ArmISA::SveIndexRIOp 106 IntRegIndex op1; member in class:ArmISA::SveIndexRROp 140 IntRegIndex op1; member in class:ArmISA::SvePredCountPredOp 155 IntRegIndex dest, op1, op2; member in class:ArmISA::SveWhileOp 170 IntRegIndex op1, op2; member in class:ArmISA::SveCompTermOp 183 IntRegIndex dest, op1, gp; member in class:ArmISA::SveUnaryPredOp 197 IntRegIndex dest, op1; member in class:ArmISA::SveUnaryUnpredOp 246 IntRegIndex dest, op1; member in class:ArmISA::SveBinImmUnpredConstrOp 308 IntRegIndex dest, op1, op2, gp; member in class:ArmISA::SveBinConstrPredOp 325 IntRegIndex dest, op1, op2; member in class:ArmISA::SveBinUnpredOp 339 IntRegIndex dest, op1, op2; member in class:ArmISA::SveBinIdxUnpredOp 355 IntRegIndex dest, op1, op2, gp; member in class:ArmISA::SvePredLogicalOp 371 IntRegIndex dest, op1, op2; member in class:ArmISA::SvePredBinPermOp 386 IntRegIndex dest, gp, op1, op2; member in class:ArmISA::SveCmpOp 401 IntRegIndex dest, gp, op1; member in class:ArmISA::SveCmpImmOp 417 IntRegIndex dest, op1, op2, gp; member in class:ArmISA::SveTerPredOp 448 IntRegIndex dest, op1, gp; member in class:ArmISA::SveReducOp 462 IntRegIndex dest, op1, gp; member in class:ArmISA::SveOrdReducOp 492 IntRegIndex op1, op2; member in class:ArmISA::SveIntCmpOp 509 IntRegIndex op1; member in class:ArmISA::SveIntCmpImmOp 532 IntRegIndex dest, op1, op2; member in class:ArmISA::SveAdrOp 572 IntRegIndex op1; member in class:ArmISA::SvePartBrkOp 588 IntRegIndex op1; member in class:ArmISA::SvePartBrkPropOp 605 IntRegIndex op1; member in class:ArmISA::SveSelectOp 628 IntRegIndex op1; member in class:ArmISA::SveUnaryPredPredOp 644 IntRegIndex op1; member in class:ArmISA::SveTblOp 659 IntRegIndex op1; member in class:ArmISA::SveUnpackOp 672 IntRegIndex op1; member in class:ArmISA::SvePredTestOp 714 IntRegIndex op1; member in class:ArmISA::SvePredUnaryWImplicitDstOp 738 IntRegIndex op1; member in class:ArmISA::SveBinImmUnpredDestrOp 753 IntRegIndex dest, op1; member in class:ArmISA::SveBinImmIdxUnpredOp 769 IntRegIndex dest, op1; member in class:ArmISA::SveUnarySca2VecUnpredOp 785 IntRegIndex dest, op1, op2; member in class:ArmISA::SveDotProdIdxOp 803 IntRegIndex dest, op1, op2; member in class:ArmISA::SveDotProdOp 820 IntRegIndex dest, op1, op2, gp; member in class:ArmISA::SveComplexOp 837 IntRegIndex dest, op1, op2; member in class:ArmISA::SveComplexIdxOp [all...] |
H A D | vfp.cc | 221 fixDest(bool flush, bool defaultNan, fpType val, fpType op1) argument 251 fixDest(bool flush, bool defaultNan, fpType val, fpType op1, fpType op2) argument 292 fixDivDest(bool flush, bool defaultNan, fpType val, fpType op1, fpType op2) argument 330 float op1 = 0.0; local 366 double op1 = 0.0; local 907 processNans(FPSCR &fpscr, bool &done, bool defaultNan, fpType op1, fpType op2) const argument 951 ternaryOp(FPSCR &fpscr, fpType op1, fpType op2, fpType op3, fpType (*func)(fpType, fpType, fpType), bool flush, bool defaultNan, uint32_t rMode) const argument 1029 binaryOp(FPSCR &fpscr, fpType op1, fpType op2, fpType (*func)(fpType, fpType), bool flush, bool defaultNan, uint32_t rMode) const argument 1100 unaryOp(FPSCR &fpscr, fpType op1, fpType (*func)(fpType), bool flush, uint32_t rMode) const argument 1170 nextIdxs(IntRegIndex &dest, IntRegIndex &op1, IntRegIndex &op2) argument 1182 nextIdxs(IntRegIndex &dest, IntRegIndex &op1) argument [all...] |
H A D | vfp.hh | 131 flushToZero(fpType &op1, fpType &op2) argument 149 vfpFlushToZero(FPSCR &fpscr, fpType &op1, fpType &op2) argument 589 fpMulAdd(T op1, argument 788 doOp(float op1, float op2) const argument 800 doOp(double op1, double op2) const argument 885 IntRegIndex op1, op2; member in class:ArmISA::FpCondCompRegOp 903 IntRegIndex dest, op1, op2; member in class:ArmISA::FpCondSelOp 921 IntRegIndex op1; member in class:ArmISA::FpRegRegOp 957 IntRegIndex op1; member in class:ArmISA::FpRegRegImmOp 976 IntRegIndex op1; member in class:ArmISA::FpRegRegRegOp 995 IntRegIndex op1; member in class:ArmISA::FpRegRegRegCondOp 1017 IntRegIndex op1; member in class:ArmISA::FpRegRegRegRegOp 1038 IntRegIndex op1; member in class:ArmISA::FpRegRegRegImmOp [all...] |
H A D | fplib.cc | 2379 fplibAdd(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 2389 fplibAdd(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 2399 fplibAdd(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 2409 fplibCompare(uint16_t op1, uint16_t op2, bool signal_nans, FPSCR &fpscr) argument 2443 fplibCompare(uint32_t op1, uint32_ argument 2477 fplibCompare(uint64_t op1, uint64_t op2, bool signal_nans, FPSCR &fpscr) argument 2864 fplibMulAdd(uint16_t addend, uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 2874 fplibMulAdd(uint32_t addend, uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 2884 fplibMulAdd(uint64_t addend, uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 2894 fplibDiv(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 2904 fplibDiv(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 2914 fplibDiv(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3131 fp16_minmaxnum(uint16_t *op1, uint16_t *op2, int sgn) argument 3143 fp32_minmaxnum(uint32_t *op1, uint32_t *op2, int sgn) argument 3155 fp64_minmaxnum(uint64_t *op1, uint64_t *op2, int sgn) argument 3168 fplibMax(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3191 fplibMax(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3214 fplibMax(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3237 fplibMaxNum(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3245 fplibMaxNum(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3253 fplibMaxNum(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3261 fplibMin(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3284 fplibMin(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3307 fplibMin(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3330 fplibMinNum(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3338 fplibMinNum(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3346 fplibMinNum(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3354 fplibMul(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3364 fplibMul(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3374 fplibMul(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3384 fplibMulX(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3415 fplibMulX(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3446 fplibMulX(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3622 fplibRSqrtStepFused(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3652 fplibRSqrtStepFused(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3682 fplibRSqrtStepFused(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 3898 fplibRecipStepFused(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 3928 fplibRecipStepFused(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 3958 fplibRecipStepFused(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 4380 fp16_muladd(coeff[op2 >> (FP16_BITS - 1)][coeff_index], op1, local 4388 fplibTrigMulAdd(uint8_t coeff_index, uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 4422 fplibTrigMulAdd(uint8_t coeff_index, uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 4456 fplibTrigSMul(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 4476 fplibTrigSMul(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 4495 fplibTrigSMul(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument 4514 fplibTrigSSel(uint16_t op1, uint16_t op2, FPSCR &fpscr) argument 4525 fplibTrigSSel(uint32_t op1, uint32_t op2, FPSCR &fpscr) argument 4536 fplibTrigSSel(uint64_t op1, uint64_t op2, FPSCR &fpscr) argument [all...] |
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/ |
H A D | int_datatype.cpp | 72 unsigned int op1 = VAL1; local [all...] |
/gem5/src/arch/arm/ |
H A D | utility.hh | 308 msrMrs64IssBuild(bool isRead, uint32_t op0, uint32_t op1, uint32_t crn, argument
|
H A D | miscregs.cc | 1200 decodeAArch64SysReg(unsigned op0, unsigned op1, argument [all...] |
H A D | faults.cc | 822 uint32_t op0, op1, op2, CRn, CRm, Rt, dir; local
|
/gem5/src/base/ |
H A D | circular_queue.hh | 105 moduloAdd(uint32_t op1, uint32_t op2, uint32_t size) argument 112 moduloSub(uint32_t op1, uint32_t op2, uint32_t size) argument 119 sub(uint32_t op1, uint32_t op2, uint32_t size) argument
|
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/ |
H A D | std_ulogic_vector_datatype.cpp | 490 std_ulogic_vector<4> op1; local [all...] |
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/ |
H A D | std_ulogic_datatype.cpp | 196 std_ulogic op1 = sc_logic(VAL1); local [all...] |