| /gem5/src/mem/cache/tags/ |
| H A D | sector_tags.cc | 87 SectorSubBlk*& blk = sec_blk->blks[k]; local
[all...] |
| H A D | base_set_assoc.cc | 71 CacheBlk* blk = &blks[blk_index]; local
85 BaseSetAssoc::invalidate(CacheBlk *blk) argument
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| H A D | base_set_assoc.hh | 129 CacheBlk *blk = findBlock(addr, is_secure); variable
236 visitor(blk); variable
[all...] |
| H A D | base.cc | 89 CacheBlk* blk = static_cast<CacheBlk*>(location); local
101 BaseTags::insertBlock(const PacketPtr pkt, CacheBlk *blk) argument
135 BaseTags::cleanupRefsVisitor(CacheBlk &blk) argument
150 computeStatsVisitor(CacheBlk &blk) argument
[all...] |
| H A D | compressed_tags.cc | 77 SectorSubBlk*& blk = superblock->blks[k]; local
166 insertBlock(const PacketPtr pkt, CacheBlk *blk) argument
[all...] |
| H A D | base.hh | 257 virtual void invalidate(CacheBlk *blk) argument
[all...] |
| H A D | fa_lru.cc | 121 FALRU::invalidate(CacheBlk *blk) argument
151 FALRUBlk* blk = static_cast<FALRUBlk*>(findBlock(addr, is_secure)); local
175 FALRUBlk* blk = nullptr; local
212 insertBlock(const PacketPtr pkt, CacheBlk *blk) argument
233 moveToHead(FALRUBlk *blk) argument
260 moveToTail(FALRUBlk *blk) argument
296 const FALRUBlk* blk = head; local
324 FALRUBlk* blk = numTrackedCaches ? head : nullptr; local
348 moveBlockToHead(FALRUBlk *blk) argument
374 moveBlockToTail(FALRUBlk *blk) argument
399 recordAccess(FALRUBlk *blk) argument
[all...] |
| /gem5/src/mem/ruby/slicc_interface/ |
| H A D | RubySlicc_Util.hh | 101 testAndRead(Addr addr, DataBlock& blk, Packet *pkt) argument
127 testAndReadMask(Addr addr, DataBlock& blk, WriteMask& mask, Packet *pkt) argument
156 testAndWrite(Addr addr, DataBlock& blk, Packet *pkt) argument
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| /gem5/src/mem/cache/compressors/ |
| H A D | base.cc | 131 BaseCacheCompressor::setDecompressionLatency(CacheBlk* blk, const Cycles lat) argument
141 BaseCacheCompressor::setSizeBits(CacheBlk* blk, const std::size_t size_bits) argument
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| /gem5/src/mem/cache/ |
| H A D | noncoherent_cache.cc | 73 NoncoherentCache::satisfyRequest(PacketPtr pkt, CacheBlk *blk, bool, bool) argument
83 NoncoherentCache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, argument
122 NoncoherentCache::handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, argument
150 createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, bool needs_writable, bool is_whole_line_write) const argument
174 handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk, PacketList &writebacks) argument
245 serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk) argument
338 evictBlock(CacheBlk *blk) argument
[all...] |
| H A D | cache_blk.hh | 509 CacheBlk *blk; member in class:CacheBlkPrintWrapper
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| H A D | cache.cc | 81 Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk, argument
164 Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, argument
316 handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time) argument
327 handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, Tick forward_time, Tick request_time) argument
480 createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, bool needsWritable, bool is_whole_line_write) const argument
566 handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk, PacketList &writebacks) argument
689 serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk) argument
887 evictBlock(CacheBlk *blk) argument
898 cleanEvictBlk(CacheBlk *blk) argument
971 handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, bool is_deferred, bool pending_inval) argument
1194 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); local
1309 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); local
[all...] |
| H A D | base.cc | 171 BaseCache::regenerateBlkAddr(CacheBlk* blk) argument
213 BaseCache::handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time) argument
241 BaseCache::handleTimingReqMiss(PacketPtr pkt, MSHR *mshr, CacheBlk *blk, argument
343 CacheBlk *blk local
467 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); local
554 CacheBlk *blk = nullptr; local
628 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); local
681 cmpAndSwap(CacheBlk *blk, PacketPtr pkt) argument
799 updateCompressionData(CacheBlk *blk, const uint64_t* data, PacketList &writebacks) argument
898 satisfyRequest(PacketPtr pkt, CacheBlk *blk, bool, bool) argument
990 calculateAccessLatency(const CacheBlk* blk, const uint32_t delay, const Cycles lookup_lat) const argument
1024 access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, PacketList &writebacks) argument
1323 maintainClusivity(bool from_cache, CacheBlk *blk) argument
1335 handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, bool allocate) argument
1526 invalidateBlock(CacheBlk *blk) argument
1538 evictBlock(CacheBlk *blk, PacketList &writebacks) argument
1547 writebackBlk(CacheBlk *blk) argument
1595 writecleanBlk(CacheBlk *blk, Request::Flags dest, PacketId id) argument
[all...] |
| /gem5/src/mem/cache/prefetch/ |
| H A D | access_map_pattern_matching.cc | 213 Addr blk = states_current_block - stride; local
219 Addr blk = current_block - stride; local
237 Addr blk = (states_current_block + stride) % lines_per_zone; local
243 Addr blk local
[all...] |
| /gem5/ext/mcpat/cacti/ |
| H A D | decoder.h | 166 PredecBlk * blk; member in class:PredecBlkDrv
|