Searched refs:readVecPredReg (Results 1 - 12 of 12) sorted by relevance

/gem5/src/cpu/o3/
H A Dregfile.hh273 const VecPredRegContainer& readVecPredReg(PhysRegIdPtr phys_reg) const function in class:PhysRegFile
287 return const_cast<VecPredRegContainer&>(readVecPredReg(phys_reg));
H A Ddyn_inst.hh236 this->cpu->readVecPredReg(prev_phys_reg));
368 return this->cpu->readVecPredReg(this->_srcRegIdx[idx]);
H A Dthread_context.hh293 readVecPredReg(const RegId& id) const override
H A Dcpu.cc1241 FullO3CPU<Impl>::readVecPredReg(PhysRegIdPtr phys_reg) const
1245 return regFile.readVecPredReg(phys_reg);
1373 return readVecPredReg(phys_reg);
H A Dcpu.hh406 const VecPredRegContainer& readVecPredReg(PhysRegIdPtr reg_idx) const;
/gem5/src/cpu/
H A Dthread_context.cc94 const TheISA::VecPredRegContainer& t1 = one->readVecPredReg(rid);
95 const TheISA::VecPredRegContainer& t2 = two->readVecPredReg(rid);
H A Dthread_context.hh247 virtual const VecPredRegContainer& readVecPredReg(const RegId& reg)
H A Dsimple_thread.hh419 readVecPredReg(const RegId &reg) const override
/gem5/src/cpu/checker/
H A Dthread_context.hh329 readVecPredReg(const RegId& reg) const override
331 return actualTC->readVecPredReg(reg);
H A Dcpu.hh314 return thread->readVecPredReg(reg);
/gem5/src/cpu/minor/
H A Dexec_context.hh188 return thread.readVecPredReg(reg);
/gem5/src/cpu/simple/
H A Dexec_context.hh345 return thread->readVecPredReg(reg);

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