/gem5/ext/systemc/src/sysc/qt/md/ |
H A D | vax.s | 56 movl (sp)+,r9 /* Get `startup'. */ 61 calls $1,(r9) /* Call `startup', pop `qt' on return. */
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H A D | m88k_b.s | 64 add r8, r9,r0 69 add r8, r9,r0 75 add r8, r9,r0 80 add r8, r9,r0
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H A D | m88k.s | 17 * Argument registers r2..r9, return value r2..r3. 48 ** for r2-r9 for varargs. For context switches we don't use 126 addu r9, r18,0 /* Set arg7. */
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H A D | hppa.s | 56 stw %r9,-104(%sp) 85 ldw -104(%sp),%r9
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H A D | powerpc_mach.s | 612 lwz r9,PAR_10(r1)
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H A D | powerpc_sys5.s | 610 lwz %r9,PAR_10(%r1)
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/gem5/src/arch/x86/ |
H A D | nativetrace.cc | 56 r9 = X86ISA::gtoh(r9); 83 r9 = tc->readIntReg(X86ISA::INTREG_R9); 165 checkReg("r9", mState.r9, nState.r9);
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H A D | nativetrace.hh | 59 uint64_t r9; member in struct:Trace::X86NativeTrace::ThreadState
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H A D | remote_gdb.hh | 109 uint64_t r9; member in struct:X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED
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H A D | remote_gdb.cc | 120 r.r9 = context->readIntReg(INTREG_R9); 172 context->setIntReg(INTREG_R9, r.r9);
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/gem5/system/alpha/palcode/ |
H A D | osfpal.S | 108 // r9 ITBmiss/DTBmiss scratch 262 srl r25, isr_v_hlt, r9 // Get HLT bit 266 blbs r9, sys_halt_interrupt // halt_interrupt if HLT bit set 295 subq r13, 0x1d, r9 // Check for 1d, 1e, 1f 297 cmovge r9, r8, r12 // if .ge. 1d, then take shifted value 323 // This routine can use the PALshadow registers r8, r9, and r10 366 // This routine can use the PALshadow registers r8, r9, and r10 377 mfpr r9, ev5__mm_stat // Get read/write bit. E0. 410 // r9 - original MMstat 574 srl r13, mm_stat_v_opcode, r9 // Shif [all...] |
H A D | platform.S | 916 lda r9, mchk_c_sys_ecc(r31) // System Correctable error MCHK code 1036 lda r9, 1(r31) 1037 sll r9, hwint_clr_v_crdc, r9 // get ack bit for crd 1038 mtpr r9, ev5__hwint_clr // ack the crd interrupt 1041 lda r9, mchk_c_ecc_c(r31) // Correctable error MCHK code 1107 stq_p r9, mchk_crd_mchk_code(r14) 1114 sll r1, 63, r9 // Move retry flag to bit 63 1115 lda r1, mchk_crd_size(r9) // Combine retry flag and frame size 1483 or r31, 1, r9 // ge [all...] |
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/ |
H A D | int_datatype.cpp | 74 unsigned int r1, r2, r3, r4, r5, r6, r7, r8, r9; local 95 r9 = op1 < op2; // Less than 174 << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
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/gem5/system/alpha/h/ |
H A D | dc21164FromGasSources.h | 698 #define r9 $9 macro 802 #define p1 r9 /* ITB/DTB Miss Scratch */
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/gem5/util/statetrace/arch/amd64/ |
H A D | tracechild.cc | 100 case R9: return myregs.r9;
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/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/ |
H A D | std_ulogic_datatype.cpp | 198 std_ulogic r1, r2, r3, r4, r5, r6, r7, r8, r9; local 219 // r9 = op1 < op2; // Less than 298 // << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
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/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/ |
H A D | std_ulogic_vector_datatype.cpp | 495 std_ulogic_vector<4> r9, r10, r11, r12, r13, r14; local 519 // r9 = op1 < op2; // Less than 613 // << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
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/gem5/src/cpu/kvm/ |
H A D | x86_cpu.cc | 115 APPLY_IREG(r9, INTREG_R9); \
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