Searched refs:getPort (Results 1 - 25 of 106) sorted by relevance

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/gem5/src/dev/
H A Dio_device.cc67 PioDevice::getPort(const std::string &if_name, PortID idx) function in class:PioDevice
72 return ClockedObject::getPort(if_name, idx);
H A Dio_device.hh146 Port &getPort(const std::string &if_name,
/gem5/src/dev/net/
H A Detherbus.hh74 Port &getPort(const std::string &if_name,
H A Detherbus.cc85 EtherBus::getPort(const std::string &if_name, PortID idx) function in class:EtherBus
H A Ddist_etherlink.cc112 DistEtherLink::getPort(const std::string &if_name, PortID idx) function in class:DistEtherLink
116 return SimObject::getPort(if_name, idx);
/gem5/src/systemc/core/
H A DSystemC.py66 def getPort(self, if_name, iex): member in class:SystemC_ScModule
/gem5/src/cpu/testers/directedtest/
H A DRubyDirectedTester.cc82 RubyDirectedTester::getPort(const std::string &if_name, PortID idx) function in class:RubyDirectedTester
86 return ClockedObject::getPort(if_name, idx);
89 panic("RubyDirectedTester::getPort: unknown index %d\n", idx);
H A DRubyDirectedTester.hh71 Port &getPort(const std::string &if_name,
/gem5/src/mem/
H A Dexternal_master.cc64 ExternalMaster::getPort(const std::string &if_name, PortID idx) function in class:ExternalMaster
86 return SimObject::getPort(if_name, idx);
H A Dexternal_master.hh125 Port &getPort(const std::string &if_name,
H A Dexternal_slave.hh131 Port &getPort(const std::string &if_name,
H A Ddramsim2.hh194 Port &getPort(const std::string &if_name,
H A Dsimple_mem.hh183 Port &getPort(const std::string &if_name,
/gem5/src/dev/x86/
H A Di8259.hh96 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
103 return BasicPioDevice::getPort(if_name, idx);
H A Di8254.hh74 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
79 return BasicPioDevice::getPort(if_name, idx);
H A Dcmos.hh86 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
91 return BasicPioDevice::getPort(if_name, idx);
H A Di8042.hh132 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
139 return BasicPioDevice::getPort(if_name, idx);
H A Di82094aa.hh106 Port &getPort(const std::string &if_name,
/gem5/src/learning_gem5/part2/
H A Dsimple_memobj.cc45 SimpleMemobj::getPort(const std::string &if_name, PortID idx) function in class:SimpleMemobj
58 return SimObject::getPort(if_name, idx);
H A Dsimple_memobj.hh248 Port &getPort(const std::string &if_name,
/gem5/src/mem/qos/
H A Dmem_sink.hh140 Port &getPort(const std::string &if_name, PortID=InvalidPortID) override;
/gem5/src/cpu/testers/memtest/
H A Dmemtest.hh81 Port &getPort(const std::string &if_name,
/gem5/src/cpu/testers/garnet_synthetic_traffic/
H A DGarnetSyntheticTraffic.hh67 Port &getPort(const std::string &if_name,
/gem5/src/sim/
H A Dsim_object.hh174 virtual Port &getPort(const std::string &if_name,
/gem5/src/dev/arm/
H A Dsmmu_v3_slaveifc.hh120 Port& getPort(const std::string &name, PortID id) override;

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