Searched refs:elemIndex (Results 1 - 8 of 8) sorted by relevance

/gem5/src/cpu/o3/
H A Dthread_context.hh232 id.elemIndex());
240 id.elemIndex());
248 id.elemIndex());
256 id.elemIndex());
264 return setVecLaneFlat(flattenRegId(reg).index(), reg.elemIndex(), val);
270 return setVecLaneFlat(flattenRegId(reg).index(), reg.elemIndex(), val);
276 return setVecLaneFlat(flattenRegId(reg).index(), reg.elemIndex(), val);
282 return setVecLaneFlat(flattenRegId(reg).index(), reg.elemIndex(), val);
289 return readVecElemFlat(flattenRegId(reg).index(), reg.elemIndex());
334 setVecElemFlat(flattenRegId(reg).index(), reg.elemIndex(), va
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H A Dregfile.hh241 return readVecReg(phys_reg).laneView<VecElem>(phys_reg->elemIndex());
252 int(phys_reg->index()), phys_reg->elemIndex(), val);
255 phys_reg->elemIndex()) = val;
264 const VecElem& val = ret[phys_reg->elemIndex()];
266 " has data %#x\n", phys_reg->elemIndex(),
347 " %#x\n", phys_reg->elemIndex(), int(phys_reg->index()), val);
349 vectorRegFile[phys_reg->index()].as<VecElem>()[phys_reg->elemIndex()] =
H A Dthread_context_impl.hh237 const ElemIndex& elemIndex) const
239 return cpu->readArchVecElem(idx, elemIndex, thread->threadId());
294 const ElemIndex& elemIndex, const VecElem& val)
296 cpu->setArchVecElem(idx, elemIndex, val, thread->threadId());
293 setVecElemFlat(RegIndex idx, const ElemIndex& elemIndex, const VecElem& val) argument
H A Dregfile.cc161 elemIdx].elemIndex() == elemIdx);
231 reg->elemIndex()];
/gem5/src/cpu/
H A Dsimple_thread.hh337 auto regVal = readVecLaneFlat<T>(flatIndex, reg.elemIndex());
339 reg.index(), flatIndex, reg.elemIndex(), regVal);
378 setVecLaneFlat(flatIndex, reg.elemIndex(), val);
380 reg.index(), flatIndex, reg.elemIndex(), val);
412 const VecElem& regVal = readVecElemFlat(flatIndex, reg.elemIndex());
414 " %#x.\n", reg.elemIndex(), reg.index(), flatIndex, regVal);
496 setVecElemFlat(flatIndex, reg.elemIndex(), val);
498 " %#x.\n", reg.elemIndex(), reg.index(), flatIndex, val);
653 readVecElemFlat(RegIndex reg, const ElemIndex &elemIndex) const override
655 return vecRegs[reg].as<TheISA::VecElem>()[elemIndex];
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H A Dreg_class.hh110 && elemIdx == that.elemIndex();
124 (regIdx == that.index() && elemIdx < that.elemIndex())));
204 const RegIndex& elemIndex() const { return elemIdx; } function in class:RegId
247 /** Vector PhysRegId constructor (w/ elemIndex). */
260 using RegId::elemIndex;
/gem5/src/cpu/minor/
H A Ddyn_inst.cc165 static_cast<unsigned int>(reg.elemIndex()) << ']';
/gem5/src/arch/arm/
H A Disa.hh460 regId.elemIndex());

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