Searched refs:completed (Results 1 - 6 of 6) sorted by relevance

/gem5/src/cpu/o3/
H A Dmem_dep_unit.hh144 void completed(const DynInstPtr &inst);
183 completed(false), squashed(false)
223 /** If the instruction is completed. */
224 bool completed; member in class:MemDepUnit::MemDepEntry
H A Dlsq_unit.hh163 /** Whether or not the store is completed. */
200 bool& completed() { return _completed; } function in class:LSQUnit::SQEntry
201 const bool& completed() const { return _completed; } function in class:LSQUnit::SQEntry
346 !storeWBIt->completed() &&
784 if (store_it->completed()) {
H A Dmem_dep_unit_impl.hh407 MemDepUnit<MemDepPred, Impl>::completed(const DynInstPtr &inst) function in class:MemDepUnit
434 completed(inst);
437 DPRINTF(MemDepUnit, "barrier completed: %s SN:%lli\n", inst->pcState(),
H A Dlsq_unit_impl.hh613 // Check the recently completed loads to see if any match this store's
930 // The store is basically completed at this time. This
995 store_idx->completed() = true;
1011 } while (storeQueue.front().completed() &&
1044 // Tell the checker we've completed this instruction. Some stores
H A Dinst_queue_impl.hh756 // The CPU could have been sleeping until this op completed (*extremely*
1003 DPRINTF(IQ, "Waking dependents of completed instruction.\n");
1140 memDepUnit[tid].completed(completed_inst);
/gem5/src/arch/arm/
H A Dmiscregs.cc2851 static bool completed = false; local
2852 if (completed)
5053 completed = true;

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