Searched refs:Q_BASE_SIZE_MASK (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dsmmu_v3_cmdexec.cc63 smmu.regs.cmdq_base & Q_BASE_SIZE_MASK);
67 (smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) + 1);
H A Dsmmu_v3_defs.hh96 Q_BASE_SIZE_MASK = 0x000000000000001fULL, enumerator in enum:__anon14
H A Dsmmu_v3_transl.cc1300 int sizeMask = mask(smmu.regs.eventq_base & Q_BASE_SIZE_MASK);

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