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14104:b2c26dc6f20e |
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24-Jun-2019 |
Giacomo Travaglini <giacomo.travaglini@arm.com> |
dev-arm: Fix SMMUv3 CMDQ wrapping
SMMU circular queues have a wrap bit which is used in order to distinguish between an empty queue and a full queue.
According to SMMUv3 spec:
Each index has a wrap flag, represented by the next higher bit adjacent to the index value contained in PROD and CONS. This bit must toggle each time the index wraps off the high end and back onto the low end of the buffer. It is the responsibility of the owner of each index, producer or consumer, to toggle this bit when the owner updates the index after wrapping. It is intended that software reads the register, increments or wraps the index (toggling wrap when required) and writes back both wrap and index fields at the same time.
Change-Id: Idfeb397141f3627c2878caaeaa2625fadf671d2a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Michiel Van Tol <michiel.vantol@arm.com> Reviewed-by: Adrian Herrera <adrian.herrera@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19311 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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14065:f925f90bda01 |
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24-Jun-2019 |
Giacomo Travaglini <giacomo.travaglini@arm.com> |
dev-arm: Remove un-needed Q_CONS_PROD_MASK macro
Change-Id: I858d7eea088bbdd2dc12123e21e59991c896597f Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Michiel Van Tol <michiel.vantol@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19310 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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14064:870553bad072 |
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18-Jun-2019 |
Adrian Herrera <adrian.herrera@arm.com> |
dev-arm: drain implementation for SMMUv3
SMMUv3 is drained when (1) no SMMU translations are pending on any of its slave interfaces and (2) no commands are stored in the Command Queue waiting to be processed.
Change-Id: I81cef5fd821fa5e509e130af02aece5239493df5 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19309 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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14039:4991b2a345a1 |
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05-Mar-2019 |
Stanislaw Czerniawski <stacze01@arm.com> |
dev-arm: Implement a SMMUv3 model
This is an implementation of the SMMUv3 architecture.
What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId
What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported
Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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