114039Sstacze01@arm.com/* 214039Sstacze01@arm.com * Copyright (c) 2013, 2018-2019 ARM Limited 314039Sstacze01@arm.com * All rights reserved 414039Sstacze01@arm.com * 514039Sstacze01@arm.com * The license below extends only to copyright in the software and shall 614039Sstacze01@arm.com * not be construed as granting a license to any other intellectual 714039Sstacze01@arm.com * property including but not limited to intellectual property relating 814039Sstacze01@arm.com * to a hardware implementation of the functionality of the software 914039Sstacze01@arm.com * licensed hereunder. You may use the software subject to the license 1014039Sstacze01@arm.com * terms below provided that you ensure that this notice is replicated 1114039Sstacze01@arm.com * unmodified and in its entirety in all distributions of the software, 1214039Sstacze01@arm.com * modified or unmodified, in source code or in binary form. 1314039Sstacze01@arm.com * 1414039Sstacze01@arm.com * Redistribution and use in source and binary forms, with or without 1514039Sstacze01@arm.com * modification, are permitted provided that the following conditions are 1614039Sstacze01@arm.com * met: redistributions of source code must retain the above copyright 1714039Sstacze01@arm.com * notice, this list of conditions and the following disclaimer; 1814039Sstacze01@arm.com * redistributions in binary form must reproduce the above copyright 1914039Sstacze01@arm.com * notice, this list of conditions and the following disclaimer in the 2014039Sstacze01@arm.com * documentation and/or other materials provided with the distribution; 2114039Sstacze01@arm.com * neither the name of the copyright holders nor the names of its 2214039Sstacze01@arm.com * contributors may be used to endorse or promote products derived from 2314039Sstacze01@arm.com * this software without specific prior written permission. 2414039Sstacze01@arm.com * 2514039Sstacze01@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2614039Sstacze01@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2714039Sstacze01@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2814039Sstacze01@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2914039Sstacze01@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3014039Sstacze01@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3114039Sstacze01@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3214039Sstacze01@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3314039Sstacze01@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3414039Sstacze01@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3514039Sstacze01@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3614039Sstacze01@arm.com * 3714039Sstacze01@arm.com * Authors: Stan Czerniawski 3814039Sstacze01@arm.com */ 3914039Sstacze01@arm.com 4014039Sstacze01@arm.com#include "dev/arm/smmu_v3_cmdexec.hh" 4114039Sstacze01@arm.com 4214039Sstacze01@arm.com#include "base/bitfield.hh" 4314039Sstacze01@arm.com#include "dev/arm/smmu_v3.hh" 4414039Sstacze01@arm.com 4514039Sstacze01@arm.comvoid 4614039Sstacze01@arm.comSMMUCommandExecProcess::main(Yield &yield) 4714039Sstacze01@arm.com{ 4814039Sstacze01@arm.com SMMUAction a; 4914039Sstacze01@arm.com a.type = ACTION_INITIAL_NOP; 5014039Sstacze01@arm.com a.pkt = NULL; 5114039Sstacze01@arm.com a.ifc = nullptr; 5214039Sstacze01@arm.com a.delay = 0; 5314039Sstacze01@arm.com yield(a); 5414039Sstacze01@arm.com 5514039Sstacze01@arm.com while (true) { 5614039Sstacze01@arm.com busy = true; 5714039Sstacze01@arm.com 5814039Sstacze01@arm.com while (true) { 5914104Sgiacomo.travaglini@arm.com // Masking depending on CMDQ_BASE.LOG2SIZE (log(number of 6014104Sgiacomo.travaglini@arm.com // queue entries)). Example: a value of 0b101 (32 entries) 6114104Sgiacomo.travaglini@arm.com // generates a 0b11111 mask. 6214104Sgiacomo.travaglini@arm.com int size_mask = mask( 6314104Sgiacomo.travaglini@arm.com smmu.regs.cmdq_base & Q_BASE_SIZE_MASK); 6414039Sstacze01@arm.com 6514104Sgiacomo.travaglini@arm.com // In this case the wrap bit is considered (+1) 6614104Sgiacomo.travaglini@arm.com int size_mask_wrap = mask( 6714104Sgiacomo.travaglini@arm.com (smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) + 1); 6814104Sgiacomo.travaglini@arm.com 6914104Sgiacomo.travaglini@arm.com if ((smmu.regs.cmdq_cons & size_mask_wrap) == 7014104Sgiacomo.travaglini@arm.com (smmu.regs.cmdq_prod & size_mask_wrap)) 7114039Sstacze01@arm.com break; // command queue empty 7214039Sstacze01@arm.com 7314104Sgiacomo.travaglini@arm.com Addr cmd_addr = 7414039Sstacze01@arm.com (smmu.regs.cmdq_base & Q_BASE_ADDR_MASK) + 7514104Sgiacomo.travaglini@arm.com (smmu.regs.cmdq_cons & size_mask) * sizeof(SMMUCommand); 7614039Sstacze01@arm.com 7714039Sstacze01@arm.com // This deliberately resets the error field in cmdq_cons! 7814104Sgiacomo.travaglini@arm.com smmu.regs.cmdq_cons = (smmu.regs.cmdq_cons + 1) & size_mask_wrap; 7914039Sstacze01@arm.com 8014104Sgiacomo.travaglini@arm.com doRead(yield, cmd_addr, &cmd, sizeof(SMMUCommand)); 8114039Sstacze01@arm.com smmu.processCommand(cmd); 8214039Sstacze01@arm.com } 8314039Sstacze01@arm.com 8414039Sstacze01@arm.com busy = false; 8514064Sadrian.herrera@arm.com // No more commands to process, signal the SMMU as drained 8614064Sadrian.herrera@arm.com smmu.signalDrainDone(); 8714039Sstacze01@arm.com 8814039Sstacze01@arm.com doSleep(yield); 8914039Sstacze01@arm.com } 9014039Sstacze01@arm.com} 91