Searched refs:MISCREG_TLBI_VMALLE1 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmisc64.cc184 case MISCREG_TLBI_VMALLE1:
/gem5/src/arch/arm/
H A Dmiscregs.hh558 MISCREG_TLBI_VMALLE1, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1418 case MISCREG_TLBI_VMALLE1:
H A Dmiscregs.cc1348 return MISCREG_TLBI_VMALLE1;
4227 InitReg(MISCREG_TLBI_VMALLE1)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc519 { "tlbi_vmalle1", MISCREG_TLBI_VMALLE1 },

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