Searched refs:LD (Results 1 - 18 of 18) sorted by relevance
/gem5/system/arm/simple_bootloader/ |
H A D | Makefile | 47 LD=$(CROSS_COMPILE)ld macro 55 $(LD) -o $@ -N -Ttext 0x80000000 $< -non_shared -static 57 $(LD) -o $@ -N -Ttext 0x00000010 $< -non_shared -static
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/gem5/system/alpha/palcode/ |
H A D | Makefile | 38 LD=$(CROSS_COMPILE)ld macro 74 $(LD) $(LDFLAGS) -o tl_osfpal $(TLOBJS) 77 $(LD) $(LDFLAGS) -o tl_osfpal_cache $(TLOBJS_COPY) 78 $(LD) $(LDFLAGS) -o tl_osfpal_unalign $(TLOBJS_COPY_UNALIGNED) 81 $(LD) $(LDFLAGS) -o ts_osfpal $(TSOBJS) 84 $(LD) $(LDFLAGS) -o tsb_osfpal $(TSBOBJS) 87 $(LD) $(LDFLAGS) -o ts_osfpal_cache $(TSOBJS_COPY) 88 $(LD) $(LDFLAGS) -o ts_osfpal_unalign $(TSOBJS_COPY_UNALIGNED)
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/gem5/system/alpha/console/ |
H A D | Makefile | 39 LD=$(CROSS_COMPILE)ld macro 57 $(LD) -o console -N -Ttext $(DBMENTRY) -non_shared $(OBJS) -lc
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/gem5/util/m5/ |
H A D | Makefile.alpha | 36 LD=$(CROSS_COMPILE)ld
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H A D | Makefile.sparc | 36 LD=$(CROSS_COMPILE)ld
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H A D | Makefile.thumb | 49 LD=$(CROSS_COMPILE)ld
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H A D | Makefile.x86 | 32 LD=ld
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H A D | Makefile.arm | 48 LD=$(CROSS_COMPILE)ld
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H A D | Makefile.aarch64 | 48 LD=$(CROSS_COMPILE)ld
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/gem5/tests/test-progs/pthread/ |
H A D | Makefile.common | 40 LD := $(CXX)
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/gem5/src/cpu/o3/ |
H A D | regfile.hh | 245 template <typename LD> 247 setVecLane(PhysRegIdPtr phys_reg, const LD& val) 254 vectorRegFile[phys_reg->index()].laneView<typename LD::UnderlyingType>(
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H A D | cpu.hh | 396 template<typename LD> 398 setVecLane(PhysRegIdPtr phys_reg, const LD& val) 444 template<typename LD> 446 setArchVecLane(int reg_idx, int lId, ThreadID tid, const LD& val)
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H A D | dyn_inst.hh | 328 template <typename LD> 330 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val)
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H A D | thread_context.hh | 469 template <typename LD> 471 setVecLaneFlat(int idx, int lId, const LD& val)
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/gem5/src/cpu/ |
H A D | simple_thread.hh | 372 template <typename LD> 374 setVecLaneT(const RegId ®, const LD &val) 645 template <typename LD> 647 setVecLaneFlat(RegIndex reg, int lId, const LD &val) 649 vecRegs[reg].laneView<typename LD::UnderlyingType>(lId) = val;
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/gem5/src/cpu/minor/ |
H A D | exec_context.hh | 276 template <typename LD> 278 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val)
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/gem5/src/cpu/simple/ |
H A D | exec_context.hh | 286 template <typename LD> 289 const LD& val)
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/gem5/src/cpu/checker/ |
H A D | cpu.hh | 268 template <typename LD> 270 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val)
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