Searched refs:squash (Results 26 - 50 of 54) sorted by relevance

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/gem5/src/cpu/o3/
H A Dmem_dep_unit_impl.hh486 MemDepUnit<MemDepPred, Impl>::squash(const InstSeqNum &squashed_num, function in class:MemDepUnit
534 // Tell the dependency predictor to squash as well.
535 depPred.squash(squashed_num, tid);
H A Dstore_set.cc311 StoreSet::squash(InstSeqNum squashed_num, ThreadID tid)
H A Diew.hh178 void squash(ThreadID tid);
239 /** Sends commit proper information for a squash due to a branch
244 /** Sends commit proper information for a squash due to a memory order
H A Dinst_queue.hh267 void squash(ThreadID tid);
503 /** Stat for number of non-speculative instructions removed due to a squash.
H A Drename.hh197 void squash(const InstSeqNum &squash_seq_num, ThreadID tid);
251 /** Executes actual squash, removing squashed instructions. */
523 /** Stat for total number of mappings that were undone due to a squash. */
H A Drename_impl.hh375 DefaultRename<Impl>::squash(const InstSeqNum &squash_seq_num, ThreadID tid) function in class:DefaultRename
377 DPRINTF(Rename, "[tid:%i] [squash sn:%llu] Squashing instructions.\n",
382 // cycle and there should be space to hold everything due to the squash.
391 DPRINTF(Rename, "[tid:%i] [squash sn:%llu] "
392 "Rename will resume serializing after squash\n",
444 // Check stall and squash signals.
471 !fromCommit->commitInfo[tid].squash &&
921 // If resumeUnblocking is set, we unblocked during the squash,
1335 // Check if there's a squash signal, squash i
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H A Dfetch.hh352 * squash should be the commit stage.
354 void squash(const TheISA::PCState &newPC, const InstSeqNum seq_num,
588 * due to a squash.
592 * due to a squash.
H A Dcommit_impl.hh549 DPRINTF(Commit, "Generating TC squash event for [tid:%i]\n", tid);
558 // If we want to include the squashing instruction in the squash,
560 // Hopefully this doesn't mess things up. Basically I want to squash
570 rob->squash(squashed_inst, tid);
576 // Send back the squash signal to tell stages that they should
577 // squash.
578 toIEW->commitInfo[tid].squash = true;
629 DPRINTF(Commit, "Squashing after squash after request, "
634 // the squash. It'll try to re-fetch an instruction executing in
647 DPRINTF(Commit, "Executing squash afte
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H A Dlsq.hh166 * from initiateAcc to resource deallocation at commit or squash.
169 * the LSQRequest is a TranslationState, therefore, upon squash, there must
879 squash(const InstSeqNum &squashed_num, ThreadID tid) function in class:LSQ::LSQRequest
881 thread.at(tid).squash(squashed_num);
H A Drob_impl.hh480 ROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid) function in class:ROB
483 DPRINTF(ROB, "Does not need to squash due to being empty "
490 DPRINTF(ROB, "Starting to squash within the ROB.\n");
H A Dcpu.hh155 tickEvent.squash();
301 * to squash uncommitted instructions to fully drain the pipeline.
497 /** Initiates a squash of all in-flight instructions for a given
498 * thread. The source of the squash is an external update of
517 * There's also an option to not squash delay slot instructions.*/
H A Dinst_queue_impl.hh230 .desc("Number of squashed instructions iterated over during squash;"
1208 InstructionQueue<Impl>::squash(ThreadID tid) function in class:InstructionQueue
1210 DPRINTF(IQ, "[tid:%i] Starting to squash instructions in "
1219 // Also tell the memory dependence unit to squash.
1220 memDepUnit[tid].squash(squashedSeqNum[tid], tid);
H A Dlsq_unit.hh252 /** Check for ordering violations in the LSQ. For a store squash if we
253 * ever find a conflicting load. For a load, only squash if we
290 void squash(const InstSeqNum &squashed_num);
/gem5/src/cpu/pred/
H A Dtage_sc_l.cc289 TAGE_SC_L_TAGE::squash(ThreadID tid, bool taken, TAGEBase::BranchInfo *bi, function in class:TAGE_SC_L_TAGE
428 tage->squash(tid, taken, tage_bi, corrTarget);
H A Dtournament.cc310 // speculatively, restored upon squash() calls, and
311 // recomputed upon update(squash = true) calls,
332 TournamentBP::squash(ThreadID tid, void *bp_history)
H A Dsimple_indirect.cc146 SimpleIndirectPredictor::squash(InstSeqNum seq_num, ThreadID tid)
H A Dmultiperspective_perceptron_tage.hh233 void squash(ThreadID tid, void *bp_history) override;
H A Dtage_base.hh300 * This version of squash() is called once on a branch misprediction.
309 virtual void squash(
H A Dmultiperspective_perceptron_tage.cc614 tage->squash(tid, taken, bi->tageBranchInfo, corrTarget);
692 MultiperspectivePerceptronTAGE::squash(ThreadID tid, void *bp_history) function in class:MultiperspectivePerceptronTAGE
H A Dloop_predictor.cc294 LoopPredictor::squash(ThreadID tid, BranchInfo *bi) function in class:LoopPredictor
/gem5/src/arch/x86/
H A Dpagetable_walker.cc214 currState->squash();
717 Walker::WalkerState::squash() function in class:X86ISA::Walker::WalkerState
/gem5/src/sim/
H A Deventq.hh388 void squash() { flags.set(Squashed); } function in class:Event
/gem5/src/cpu/simple/
H A Dbase.cc703 branchPred->squash(cur_sn, thread->pcState(), branching, curThread);
/gem5/src/dev/net/
H A Dsinic.cc537 intrEvent->squash();
574 intrEvent->squash();
H A Dns_gige.cc874 intrEvent->squash();
911 intrEvent->squash();

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