Searched refs:queue (Results 26 - 50 of 80) sorted by relevance

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/gem5/src/sim/
H A Dsimulate.cc67 thread_loop(EventQueue *queue) argument
71 doSimLoop(queue);
95 // handles queue 0, so we only need to allocate new threads
107 inform("Entering event queue @ %d. Starting simulation...\n", curTick());
188 // we just scheduled) in the queue
194 // Take the event queue lock in case any of the service
/gem5/src/dev/net/
H A Dethertap.hh38 #include <queue>
110 std::queue<EthPacketPtr> packetBuffer;
H A Detherlink.hh50 #include <queue>
97 * Maintain a queue of in-flight packets. Assume that the
H A Ddist_iface.hh56 * thread that is processing the event queue associated with the simulated
62 * and schedule an appropriate receive event in the event queue.
82 #include <queue>
357 * The queue to store the receive descriptors.
359 std::queue<Desc> descQueue;
385 * @note It is used to access the event queue for scheduling receive
438 * Push a newly arrived packet into the desc queue.
598 * receive queue is not empty.
/gem5/util/batch/
H A Dbatch.py96 self.queue = None
121 if self.queue:
122 self.cmd.append('-q "%s"' % self.queue)
173 self.queue = None
226 if self.queue:
227 self.cmd.append('-q' + self.queue)
/gem5/util/pbs/
H A Dsend.py80 %(progname)s [-c] [-e] [-f] [-j <jobfile>] [-q queue] [-v] <regexp>
86 -q <queue> submit job to the named queue
111 queue = '' variable
141 queue = arg variable
273 if queue:
274 qsub.queue = queue
H A Dpbs.py106 self.queue = None
159 if self.queue:
160 self.cmd.append('-q' + self.queue)
/gem5/src/systemc/tests/include/
H A DSimpleATTarget1.h28 #include <queue>
76 // transactions may be kept in queue after the initiator has send END_REQ
204 std::queue<transaction_type*> mEndRequestQueue;
206 std::queue<transaction_type*> mResponseQueue;
H A DSimpleATTarget2.h28 #include <queue>
74 // transactions may be kept in queue after the initiator has send END_REQ
173 std::queue<transaction_type*> mResponseQueue;
H A DExplicitLTTarget.h28 #include <queue>
/gem5/src/dev/virtio/
H A Dbase.cc48 : memProxy(&_memProxy), queue(&_queue), _index(descIndex),
66 queue = std::move(rhs.queue);
76 const Addr vq_addr(queue->getAddress());
77 // Check if the queue has been initialized yet
81 assert(_index < queue->getSize());
137 return queue->getDescriptor(desc.next);
318 // Consume all pending descriptors from the input queue.
376 panic("Guest tried to notify queue (%i), but only %i "
477 VirtIODeviceBase::registerQueue(VirtQueue &queue) argument
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H A Dbase.hh119 * of so called descriptors using device queues. The queue is
149 * @param queue Queue owning this descriptor.
150 * @param index Index within the queue.
152 VirtDescriptor(PortProxy &memProxy, VirtQueue &queue, Index index);
299 VirtQueue *queue; member in class:VirtDescriptor
331 * Set the base address of this queue.
333 * @param address Guest physical base address of the queue.
337 * Get the guest physical address of this queue.
339 * @return Physical address in guest where this queue resides.
344 * Get the number of descriptors available in this queue
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/gem5/src/mem/cache/prefetch/
H A Dqueued.hh142 /** Maximum size of the prefetch queue */
146 * Maximum size of the queue holding prefetch requests with missing
200 * Adds a DeferredPacket to the specified queue
201 * @param queue selected queue to use
204 void addToQueue(std::list<DeferredPacket> &queue, DeferredPacket &dpp);
210 * queued in the queue of ready requests.
226 * specified queue. If the request is found, its priority is updated.
227 * @param queue selected queue t
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H A Dbop.hh41 #include <queue>
64 /** Delay queue parameters */
78 * into the cache. Adding the delay queue tries to avoid always
93 /** Event to handle the delay queue processing */
122 /** Insert the specified address into the delay queue. This will
124 * @param addr: address to insert into the delay queue
/gem5/src/mem/ruby/system/
H A DRubyPort.hh78 RespPacketQueue queue; member in class:RubyPort::MemSlavePort
122 RespPacketQueue queue; member in class:RubyPort::PioSlavePort
H A DRubyPort.cc133 : QueuedSlavePort(_name, _port, queue), queue(*_port, *this)
149 : QueuedSlavePort(_name, _port, queue, id), queue(*_port, *this),
/gem5/src/gpu-compute/
H A Dtlb_coalescer.hh40 #include <queue>
226 // this FIFO queue keeps track of the virt. page
228 std::queue<Addr> cleanupQueue;
/gem5/src/mem/qos/
H A Dmem_sink.hh73 /** Outgoing packet responses queue */
74 RespPacketQueue queue; member in class:QoS::MemSinkCtrl::MemoryPort
157 /** Read request packets queue buffer size in #packets */
160 /** Write request packets queue buffer size in #packets */
182 * QoS-aware (per priority) incoming read requests packets queue
187 * QoS-aware (per priority) incoming read requests packets queue
203 * Check if the read queue has room for more entries
205 * @param packets The number of entries needed in the read queue
206 * @return true if read queue is full, false otherwise
211 * Check if the write queue ha
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/gem5/src/mem/
H A Ddram_ctrl.cc287 DPRINTF(DRAM, "Read queue limit %d, current size %d, entries needed %d\n",
298 DPRINTF(DRAM, "Write queue limit %d, current size %d, entries needed %d\n",
414 // only add to the read queue here. whenever the request is
425 // check read packets against packets in write queue.
445 // check if the read is subsumed in the write queue
455 "write queue\n",
465 // push it onto the read queue
481 DPRINTF(DRAM, "Adding to read queue\n");
499 // If all packets are serviced by write queue, we send the repsonse back
505 // Update how many split packets are serviced by write queue
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H A Dcoherent_xbar.hh98 /** A normal packet queue used to store responses. */
99 RespPacketQueue queue; member in class:CoherentXBar::CoherentXBarSlavePort
105 : QueuedSlavePort(_name, &_xbar, queue, _id), xbar(_xbar),
106 queue(_xbar, *this)
H A Ddram_ctrl.hh108 RespPacketQueue queue; member in class:DRAMCtrl::MemoryPort
396 * Track number of packets in read queue going to this rank
401 * Track number of packets in write queue going to this rank
487 * Could expand this in the future to analyze state of entire queue
498 * Check if the command queue of current rank is idle
501 * Bus direction determines queue checked.
512 * Push command out of cmdList queue that are scheduled at
632 * the packet entered the queue, and also the decoded address.
668 * incoming read packets with packets in the write queue.
763 * Check if the read queue ha
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/gem5/ext/testlib/
H A Dhandlers.py359 # Create queue to push onto
360 self.queue = multiprocessing.Queue()
361 self.queue.cancel_join_thread()
397 item = self.queue.get(timeout=0.1)
409 item = self.queue.get(block=False)
422 self.queue.put(record)
433 # finish pickling the object and complete shutdown after the queue is
436 self.queue.close()
/gem5/src/cpu/o3/
H A Dfree_list.hh48 #include <queue>
69 std::queue<PhysRegIdPtr> freeRegs;
H A Diew.hh46 #include <queue>
315 /** Rename instruction queue interface. */
318 /** Wire to get rename's output from rename queue. */
321 /** Issue stage queue. */
324 /** Wire to read information from the issue stage time queue. */
337 std::queue<DynInstPtr> insts[Impl::MaxThreads];
340 std::queue<DynInstPtr> skidBuffer[Impl::MaxThreads];
358 /** Instruction queue. */
361 /** Load / store queue. */
399 /** Index into queue o
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/gem5/src/arch/mips/
H A Disa.hh34 #include <queue>

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