/gem5/src/mem/cache/tags/ |
H A D | compressed_tags.cc | 166 CompressedTags::insertBlock(const PacketPtr pkt, CacheBlk *blk) argument 177 SectorTags::insertBlock(pkt, blk);
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H A D | sector_tags.hh | 134 * @param pkt Packet holding the address to update 137 void insertBlock(const PacketPtr pkt, CacheBlk *blk) override;
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/gem5/src/mem/ruby/network/ |
H A D | Network.hh | 118 virtual bool functionalRead(Packet *pkt) argument 120 virtual uint32_t functionalWrite(Packet *pkt) argument
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/gem5/src/dev/virtio/ |
H A D | block.cc | 62 VirtIOBlock::readConfig(PacketPtr pkt, Addr cfgOffset) argument 67 readConfigBlob(pkt, cfgOffset, (uint8_t *)&cfg_out);
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H A D | block.hh | 75 void readConfig(PacketPtr pkt, Addr cfgOffset);
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H A D | console.hh | 73 void readConfig(PacketPtr pkt, Addr cfgOffset);
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/gem5/src/dev/x86/ |
H A D | i8042.hh | 144 Tick read(PacketPtr pkt) override; 146 Tick write(PacketPtr pkt) override;
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/gem5/ext/dnet/ |
H A D | icmp.h | 121 uint8_t icmp_ip __flexarr; /* IP hdr + 8 bytes of pkt */ 132 uint8_t icmp_ip __flexarr; /* IP hdr + 8 bytes of pkt */ 239 #define icmp_pack_hdr_quote(hdr, type, code, word, pkt, len) do { \ 244 memmove(quote_pack_p->icmp_ip, pkt, len); \ 256 #define icmp_pack_hdr_needfrag(hdr, type, code, mtu, pkt, len) do { \ 262 memmove(frag_pack_p->icmp_ip, pkt, len); \
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/gem5/src/mem/ruby/network/garnet2.0/ |
H A D | Router.cc | 279 Router::functionalWrite(Packet *pkt) argument 282 num_functional_writes += m_switch->functionalWrite(pkt); 285 num_functional_writes += m_input_unit[i]->functionalWrite(pkt); 289 num_functional_writes += m_output_unit[i]->functionalWrite(pkt);
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H A D | OutputUnit.hh | 97 uint32_t functionalWrite(Packet *pkt);
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H A D | VirtualChannel.hh | 90 uint32_t functionalWrite(Packet *pkt);
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/gem5/src/arch/riscv/insts/ |
H A D | static_inst.hh | 94 completeAcc(PacketPtr pkt, ExecContext *xc,
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/gem5/src/dev/net/ |
H A D | sinic.hh | 263 Tick read(PacketPtr pkt) override; 264 Tick write(PacketPtr pkt) override; 312 virtual bool recvPacket(EthPacketPtr pkt) { return dev->recvPacket(pkt); } argument
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H A D | i8254xGBe.hh | 527 Tick read(PacketPtr pkt) override; 528 Tick write(PacketPtr pkt) override; 530 Tick writeConfig(PacketPtr pkt) override; 553 virtual bool recvPacket(EthPacketPtr pkt) { return dev->ethRxPkt(pkt); } argument
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/gem5/src/mem/cache/prefetch/ |
H A D | bop.hh | 146 void notifyFill(const PacketPtr& pkt) override;
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H A D | sbooe.hh | 149 void notifyFill(const PacketPtr& pkt) override;
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/gem5/src/cpu/checker/ |
H A D | cpu.cc | 214 PacketPtr pkt = Packet::createRead(mem_req); local 216 pkt->dataStatic(data); 220 dcachePort->sendFunctional(pkt); 226 delete pkt;
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/gem5/src/cpu/testers/directedtest/ |
H A D | RubyDirectedTester.hh | 62 virtual bool recvTimingResp(PacketPtr pkt);
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/gem5/src/cpu/testers/rubytest/ |
H A D | RubyTester.cc | 177 RubyTester::CpuPort::recvTimingResp(PacketPtr pkt) argument 181 safe_cast<RubyTester::SenderState*>(pkt->senderState); 188 delete pkt->senderState; 189 delete pkt;
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/gem5/src/cpu/ |
H A D | base.hh | 78 bool doMonitor(PacketPtr pkt); 171 return [port](PacketPtr pkt)->void { port->sendFunctional(pkt); }; 641 bool mwait(ThreadID tid, PacketPtr pkt);
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/gem5/src/mem/ |
H A D | xbar.cc | 96 BaseXBar::calcPacketTiming(PacketPtr pkt, Tick header_delay) argument 106 pkt->headerDelay += offset + header_delay; 114 panic_if(pkt->headerDelay > SimClock::Int::us, 117 if (pkt->hasData()) { 122 pkt->payloadDelay = std::max<Tick>(pkt->payloadDelay, 123 divCeil(pkt->getSize(), width) *
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/gem5/src/dev/arm/ |
H A D | smmu_v3_transl.cc | 49 SMMUTranslRequest::fromPacket(PacketPtr pkt, bool ats) argument 52 req.addr = pkt->getAddr(); 53 req.size = pkt->getSize(); 54 req.sid = pkt->req->streamId(); 55 req.ssid = pkt->req->hasSubstreamId() ? 56 pkt->req->substreamId() : 0; 57 req.isWrite = pkt->isWrite(); 60 req.pkt = pkt; 76 req.pkt [all...] |
H A D | rv_ctrl.hh | 172 * @param pkt The memory request. 175 Tick read(PacketPtr pkt) override; 179 * @param pkt The memory request. 182 Tick write(PacketPtr pkt) override;
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/gem5/src/cpu/kvm/ |
H A D | base.cc | 180 BaseKvmCPU::KVMCpuPort::submitIO(PacketPtr pkt) argument 183 Tick delay = sendAtomic(pkt); 184 delete pkt; 187 if (pendingMMIOPkts.empty() && sendTimingReq(pkt)) { 190 pendingMMIOPkts.push(pkt); 198 BaseKvmCPU::KVMCpuPort::recvTimingResp(PacketPtr pkt) argument 202 delete pkt; 1135 PacketPtr pkt = new Packet(mmio_req, cmd); local 1136 pkt->dataStatic(data); 1143 TheISA::handleIprWrite(tc, pkt) [all...] |
/gem5/src/arch/sparc/ |
H A D | tlb.hh | 179 Cycles doMmuRegRead(ThreadContext *tc, Packet *pkt); 180 Cycles doMmuRegWrite(ThreadContext *tc, Packet *pkt);
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