/gem5/ext/systemc/src/sysc/tracing/ |
H A D | sc_wif_trace.cpp | 179 sc_dt::uint64 mask; member in class:sc_core::wif_uint64_trace 188 mask(static_cast<sc_dt::uint64>(-1)) 192 mask = ~(mask << bit_width); 209 if ((object & mask) != object) 245 sc_dt::uint64 mask; member in class:sc_core::wif_int64_trace 254 mask(static_cast<sc_dt::uint64>(-1)) 258 mask = ~(mask << bit_width); 275 if ((object & mask) ! 872 unsigned mask; member in class:sc_core::wif_unsigned_int_trace 936 unsigned short mask; member in class:sc_core::wif_unsigned_short_trace 999 unsigned char mask; member in class:sc_core::wif_unsigned_char_trace 1061 unsigned long mask; member in class:sc_core::wif_unsigned_long_trace 1124 unsigned mask; member in class:sc_core::wif_signed_int_trace 1187 unsigned short mask; member in class:sc_core::wif_signed_short_trace 1249 unsigned char mask; member in class:sc_core::wif_signed_char_trace 1311 unsigned long mask; member in class:sc_core::wif_signed_long_trace [all...] |
H A D | sc_vcd_trace.cpp | 903 unsigned mask; member in class:sc_core::vcd_unsigned_int_trace 913 mask((unsigned)-1) 916 if (bit_width < 32) mask = ~(-1 << bit_width); 937 if ((object & mask) != object) { 969 unsigned short mask; member in class:sc_core::vcd_unsigned_short_trace 978 : vcd_trace(name_, vcd_name_), object(object_), old_value(object_), mask(0xffff) 981 if (bit_width < 16) mask = (unsigned short)~(-1 << bit_width); 1002 if ((object & mask) != object) { 1034 unsigned char mask; member in class:sc_core::vcd_unsigned_char_trace 1043 : vcd_trace(name_, vcd_name_), object(object_), old_value(object_), mask( 1096 unsigned long mask; member in class:sc_core::vcd_unsigned_long_trace 1161 unsigned mask; member in class:sc_core::vcd_signed_int_trace 1224 unsigned short mask; member in class:sc_core::vcd_signed_short_trace 1287 unsigned char mask; member in class:sc_core::vcd_signed_char_trace 1349 sc_dt::uint64 mask; member in class:sc_core::vcd_int64_trace 1416 sc_dt::uint64 mask; member in class:sc_core::vcd_uint64_trace 1483 unsigned long mask; member in class:sc_core::vcd_signed_long_trace 1619 unsigned mask; member in class:sc_core::vcd_enum_trace [all...] |
/gem5/ext/dnet/ |
H A D | addr.h | 63 int addr_btom(uint16_t bits, void *mask, size_t size); 64 int addr_mtob(const void *mask, size_t size, uint16_t *bits);
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/gem5/src/mem/ruby/common/ |
H A D | DataBlock.hh | 67 void copyPartial(const DataBlock &dblk, const WriteMask &mask); 68 void atomicPartial(const DataBlock & dblk, const WriteMask & mask);
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H A D | WriteMask.hh | 52 WriteMask(int size, std::vector<bool> & mask) argument 53 : mSize(size), mMask(mask), mAtomic(false) 56 WriteMask(int size, std::vector<bool> &mask, argument 58 : mSize(size), mMask(mask), mAtomic(true), mAtomicOp(atomicOp)
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/gem5/ext/systemc/src/sysc/kernel/ |
H A D | sc_object.cpp | 461 sc_object::register_simulation_phase_callback( phase_cb_mask mask ) 463 mask = simcontext()->m_phase_cb_registry 464 ->register_callback(*this, mask); 465 return mask; 470 sc_object::unregister_simulation_phase_callback( phase_cb_mask mask ) 472 mask = simcontext()->m_phase_cb_registry 473 ->unregister_callback(*this, mask); 474 return mask;
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H A D | sc_phase_callback_registry.cpp | 95 ss << cb.name() << ": invalid phase callback mask: " 174 new_mask = (*it).mask | m; 175 diff_mask = ~(*it).mask & m; 176 (*it).mask = new_mask; 217 new_mask = (*it).mask & ~m; 218 diff_mask = (*it).mask & m; 219 (*it).mask = new_mask; 247 if( s & it->mask ) {
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H A D | sc_phase_callback_registry.h | 64 mask_type mask; member in struct:sc_core::sc_phase_callback_registry::entry 95 mask_type register_callback( cb_type&, mask_type mask ); 96 mask_type unregister_callback( cb_type&, mask_type mask );
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/gem5/src/base/ |
H A D | trie.hh | 49 Key mask; member in struct:Trie::Node 54 return (test & mask) == key; 63 key(_key & _mask), mask(_mask), value(_val), 96 parent, this, key, mask, value); 123 * @param new_mask The mask to use when matching against the key. 129 if (kid && kid->matches(key) && (kid->mask & new_mask) == kid->mask) { 138 * A utility method which extends a mask value one more bit towards the 142 * @param orig The original mask to extend. 143 * @return The extended mask [all...] |
H A D | intmath.hh | 207 T mask = (T)align - 1; local 208 return (val + mask) & ~mask; 215 T mask = (T)align - 1; local 216 return val & ~mask;
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H A D | pixel.hh | 86 * the word (i.e., it is possible to shift and mask out a contiguous 107 return round(((word >> offset) & mask) * factor); 115 return (static_cast<uint8_t>(round(ch / factor)) & mask) << offset; 120 /** Bit mask (after shifting) */ 121 unsigned mask; member in struct:PixelConverter::Channel
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/gem5/src/arch/x86/ |
H A D | mmapped_ipr.hh | 63 Addr offset = pkt->getAddr() & mask(3); 80 Addr offset = pkt->getAddr() & mask(3);
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H A D | pagetable_walker.cc | 302 nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.longl3 * dataSize; 318 nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.longl2 * dataSize; 346 ((uint64_t)pte & (mask(40) << 12)) + vaddr.longl1 * dataSize; 352 entry.paddr = (uint64_t)pte & (mask(31) << 21); 373 entry.paddr = (uint64_t)pte & (mask(40) << 12); 384 nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.pael2 * dataSize; 407 nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.pael1 * dataSize; 413 entry.paddr = (uint64_t)pte & (mask(31) << 21); 434 entry.paddr = (uint64_t)pte & (mask(40) << 12); 458 ((uint64_t)pte & (mask(2 [all...] |
/gem5/src/arch/mips/ |
H A D | isa.cc | 383 RegVal mask = 0x7FFFFFFF; local 386 replaceBits(mask, 0, 32, 0); 387 setRegMask(MISCREG_INDEX, mask); 389 mask = 0x3FFFFFFF; 390 replaceBits(mask, 0, 32, 0); 391 setRegMask(MISCREG_ENTRYLO0, mask); 392 setRegMask(MISCREG_ENTRYLO1, mask); 394 mask = 0xFF800000; 395 replaceBits(mask, 0, 32, 0); 396 setRegMask(MISCREG_CONTEXT, mask); [all...] |
/gem5/src/arch/hsail/insts/ |
H A D | mem_impl.hh | 61 const VectorMask &mask = w->getPred(); local 67 if (mask[lane]) { 170 const VectorMask &mask = w->getPred(); local 191 if (mask[lane]) { 200 if (mask[lane]) { 251 if (mask[lane]) { 280 if (mask[lane]) { 309 if (mask[lane]) { 325 if (mask[lane]) { 357 const VectorMask &mask local [all...] |
/gem5/src/cpu/minor/ |
H A D | func_unit.cc | 93 mask(params->mask), 153 " mask: %016x match: %016x srcRegLatencies: %s\n", 154 i, timing.mask, timing.match, lats.str()); 221 (mach_inst & timing.mask) == timing.match)
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/gem5/src/arch/generic/ |
H A D | vec_pred_reg.hh | 174 /// @param mask Input mask used to filter the predicates to be tested. 179 firstActive(const VecPredRegT<VecElem, NumElems, Packed, MC>& mask, argument 184 if (mask[i]) { 192 /// @param mask Input mask used to filter the predicates to be tested. 197 noneActive(const VecPredRegT<VecElem, NumElems, Packed, MC>& mask, argument 202 if (mask[i] && operator[](i)) { 210 /// @param mask Input mask use 215 lastActive(const VecPredRegT<VecElem, NumElems, Packed, MC>& mask, size_t actual_num_elems) const argument [all...] |
/gem5/src/arch/arm/insts/ |
H A D | static_inst.hh | 215 bitMask = bitMask | mask(31, lowIdx); 218 bitMask = bitMask | mask(19, 16); 224 bitMask = bitMask | mask(highIdx, lowIdx); 234 OperatingMode newMode = (OperatingMode) (val & mask(5)); 262 // If we passed all of the above then set the bit mask to 265 bitMask = bitMask | mask(5); 287 bitMask = bitMask | mask(31, 24); 289 bitMask = bitMask | mask(19, 16); 291 bitMask = bitMask | mask(15, 8); 293 bitMask = bitMask | mask( [all...] |
/gem5/src/arch/arm/ |
H A D | pagetable.hh | 240 uint64_t mask; local 247 mask = 0x180; 269 mask = 0x4FC; 273 mask |= 1 << 9; 275 attributes &= ~mask;
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H A D | types.hh | 57 /* Note that the split (cond, mask) below is not as in ARM ARM. 64 Bitfield<3, 0> mask; member in namespace:ArmISA 398 uint8_t cond_mask = it.mask; 404 cond_mask &= mask(4); 411 it.mask = cond_mask; 440 npc(val &~ mask(nextThumb() ? 1 : 2)); 458 newPC = newPC & ~mask(1); 465 newPC = newPC & ~mask(1); 470 // The easy thing to do is just mask off the bit and 472 newPC &= ~mask( [all...] |
/gem5/src/systemc/ext/dt/bit/ |
H A D | sc_bv_base.hh | 259 sc_digit mask = SC_DIGIT_ONE << bi; local 260 m_data[wi] |= mask; // set bit to 1 261 m_data[wi] &= value << bi | ~mask;
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/gem5/src/mem/ruby/slicc_interface/ |
H A D | RubySlicc_Util.hh | 120 * This function accepts an address, a data block, a write mask and a packet. 127 testAndReadMask(Addr addr, DataBlock& blk, WriteMask& mask, Packet *pkt) argument 139 if (mask.test(i + startByte)) {
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/gem5/src/arch/power/insts/ |
H A D | integer.hh | 161 fullMask = mask(31 - mb, 31 - me); 163 fullMask = ~mask(31 - (me + 1), 31 - (mb - 1));
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/gem5/src/kern/linux/ |
H A D | printk.cc | 190 uint64_t mask = (*p == 'C') ? 0xffL : 0x7fL; local 203 char c = (char)(num & mask);
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/gem5/src/mem/ |
H A D | abstract_mem.hh | 81 static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } function in class:LockedAddr 91 LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())),
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