Searched refs:True (Results 101 - 125 of 290) sorted by relevance

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/gem5/src/systemc/
H A DTlm.py58 super(TlmInitiatorSocket, self).__init__(my_role, desc, is_source=True)
67 my_role, desc, is_source=True)
/gem5/src/arch/x86/bios/
H A DIntelMP.py51 imcr_present = Param.Bool(True,
86 abstract = True
92 abstract = True
102 enable = Param.Bool(True, 'if this processor is usable')
132 enable = Param.Bool(True, 'if this APIC is usable')
H A DACPI.py45 abstract = True
H A DSMBios.py45 abstract = True
/gem5/src/cpu/o3/
H A DO3CPU.py71 return True
75 return True
132 LSQCheckLoads = Param.Bool(True,
188 updateOnError=True,
189 warnOnlyOnLoadError=True)
/gem5/src/dev/arm/
H A DSMMUv3.py60 utlb_enable = Param.Bool(True, 'Micro TLB enable')
67 tlb_enable = Param.Bool(True, 'Main TLB enable')
73 prefetch_reserve_last_way = Param.Bool(True,
111 cfg_enable = Param.Bool(True, 'Config cache enable')
132 walk_enable = Param.Bool(True, 'Walk cache enable')
/gem5/configs/ruby/
H A DGPU_VIPER_Region.py110 self.sequencer.is_cpu_sequencer = True
118 self.sequencer1.is_cpu_sequencer = True
165 self.sequencer.is_cpu_sequencer = True
364 resourceStalls = True
381 self.noTCCdir = True
398 default=True)
400 default=True)
480 rb_cntrl.isOnCPU = True
508 cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
511 rb_cntrl.requestFromCore = MessageBuffer(ordered = True)
[all...]
H A DGPU_VIPER.py109 self.sequencer.is_cpu_sequencer = True
117 self.sequencer1.is_cpu_sequencer = True
164 self.sequencer.is_cpu_sequencer = True
195 self.sequencer.is_cpu_sequencer = True
197 self.use_seq_not_coal = True
243 resourceStalls = True
363 default = True)
365 default = True)
434 dir_cntrl = DirCntrl(noTCCdir = True, TCC_select_num_bits = TCC_bits)
441 dir_cntrl.requestFromCores = MessageBuffer(ordered = True)
[all...]
H A DMOESI_CMP_token.py138 l1_cntrl.persistentFromL1Cache = MessageBuffer(ordered = True)
146 l1_cntrl.persistentToL1Cache = MessageBuffer(ordered = True)
183 l2_cntrl.persistentToL2Cache = MessageBuffer(ordered = True)
206 dir_cntrl.persistentToDir = MessageBuffer(ordered = True)
208 dir_cntrl.dmaRequestToDir = MessageBuffer(ordered = True)
215 dir_cntrl.persistentFromDir = MessageBuffer(ordered = True)
217 dir_cntrl.dmaResponseFromDir = MessageBuffer(ordered = True)
240 dma_cntrl.responseFromDir = MessageBuffer(ordered = True)
261 io_controller.responseFromDir = MessageBuffer(ordered = True)
/gem5/src/python/m5/
H A Dproxy.py113 self._visited = True
114 obj._visited = True
213 return val, True
245 return True
249 return True
268 Parent = ProxyFactory(search_self = False, search_up = True)
269 Self = ProxyFactory(search_self = True, search_up = False)
/gem5/tests/configs/
H A Dgpu-randomtest-ruby.py115 system.ruby.randomization = True
129 ruby_port.no_retry_on_stall = True
135 ruby_port.using_ruby_tester = True
H A Dpc-simple-timing-ruby.py56 mdesc=mdesc, Ruby=True)
69 Ruby.create_system(options, True, system, system.iobus, system._dma_ports)
92 root = Root(full_system = True, system = system)
H A Dtgen-simple-mem.py62 system.monitor.stackdist = StackDistProbe(verify = True)
/gem5/src/mem/cache/prefetch/
H A DPrefetcher.py64 abstract = True
76 on_read = Param.Bool(True, "Notify prefetcher on reads")
77 on_write = Param.Bool(True, "Notify prefetcher on writes")
78 on_data = Param.Bool(True, "Notify prefetcher on data accesses")
79 on_inst = Param.Bool(True, "Notify prefetcher on instruction accesses")
119 abstract = True
126 queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
127 queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
130 tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
159 use_master_id = Param.Bool(True, "Us
[all...]
/gem5/src/mem/slicc/ast/
H A DMemberExprAST.py41 return_type, gcode = self.expr_ast.inline(True)
H A DStaticCastAST.py41 actual_type, ecode = self.expr_ast.inline(True)
H A DExprStatementAST.py42 actual_type,rcode = self.expr.inline(True)
/gem5/util/stats/
H A Ddisplay.py68 pdf = Value(self.pdf, 2, True)
70 cdf = Value(self.cdf, 2, True)
81 return True
87 return True
H A Dprint.py71 pdf = Value(self.pdf, 2, True)
73 cdf = Value(self.cdf, 2, True)
84 return True
90 return True
/gem5/util/cpt_upgraders/
H A Disa-is-simobject.py41 for (key, value) in cpt.items(sec, raw=True):
/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/
H A Dconfig.py54 root = Root(full_system=True, systemc_kernel=kernel)
/gem5/ext/googletest/googlemock/scripts/
H A Dupload_gmock.py61 found_cc_flag = True
/gem5/ext/googletest/googletest/scripts/
H A Dupload_gtest.py61 found_cc_flag = True
/gem5/src/arch/mips/
H A DMipsSystem.py60 bare_iron = True
/gem5/src/cpu/simple/
H A DBaseSimpleCPU.py40 abstract = True

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