16908SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 26908SBrad.Beckmann@amd.com# Copyright (c) 2009 Advanced Micro Devices, Inc. 36908SBrad.Beckmann@amd.com# All rights reserved. 46908SBrad.Beckmann@amd.com# 56908SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without 66908SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are 76908SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright 86908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer; 96908SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright 106908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the 116908SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution; 126908SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its 136908SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from 146908SBrad.Beckmann@amd.com# this software without specific prior written permission. 156908SBrad.Beckmann@amd.com# 166908SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176908SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186908SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196908SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206908SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216908SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226908SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236908SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246908SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256908SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266908SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276908SBrad.Beckmann@amd.com# 286908SBrad.Beckmann@amd.com# Authors: Brad Beckmann 296908SBrad.Beckmann@amd.com 306908SBrad.Beckmann@amd.comimport math 316908SBrad.Beckmann@amd.comimport m5 326908SBrad.Beckmann@amd.comfrom m5.objects import * 336908SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 3412065Snikos.nikoleris@arm.comfrom Ruby import create_topology, create_directories 3510529Smorr@cs.wisc.edufrom Ruby import send_evicts 366908SBrad.Beckmann@amd.com 376908SBrad.Beckmann@amd.com# 3811019Sjthestness@gmail.com# Declare caches used by the protocol 396908SBrad.Beckmann@amd.com# 4011019Sjthestness@gmail.comclass L1Cache(RubyCache): pass 4111019Sjthestness@gmail.comclass L2Cache(RubyCache): pass 426908SBrad.Beckmann@amd.com 437538SBrad.Beckmann@amd.comdef define_options(parser): 447539SBrad.Beckmann@amd.com parser.add_option("--l1-retries", type="int", default=1, 457539SBrad.Beckmann@amd.com help="Token_CMP: # of l1 retries before going persistent") 467539SBrad.Beckmann@amd.com parser.add_option("--timeout-latency", type="int", default=300, 477539SBrad.Beckmann@amd.com help="Token_CMP: cycles until issuing again"); 487539SBrad.Beckmann@amd.com parser.add_option("--disable-dyn-timeouts", action="store_true", 497539SBrad.Beckmann@amd.com help="Token_CMP: disable dyanimc timeouts, use fixed latency instead") 507561SBrad.Beckmann@amd.com parser.add_option("--allow-atomic-migration", action="store_true", 517561SBrad.Beckmann@amd.com help="allow migratory sharing for atomic only accessed blocks") 5210917Sbrandon.potter@amd.com 5312598Snikos.nikoleris@arm.comdef create_system(options, full_system, system, dma_ports, bootmem, 5412598Snikos.nikoleris@arm.com ruby_system): 5510917Sbrandon.potter@amd.com 566908SBrad.Beckmann@amd.com if buildEnv['PROTOCOL'] != 'MOESI_CMP_token': 576908SBrad.Beckmann@amd.com panic("This script requires the MOESI_CMP_token protocol to be built.") 586908SBrad.Beckmann@amd.com 596908SBrad.Beckmann@amd.com # 606908SBrad.Beckmann@amd.com # number of tokens that the owner passes to requests so that shared blocks can 616908SBrad.Beckmann@amd.com # respond to read requests 626908SBrad.Beckmann@amd.com # 636908SBrad.Beckmann@amd.com n_tokens = options.num_cpus + 1 646908SBrad.Beckmann@amd.com 656908SBrad.Beckmann@amd.com cpu_sequencers = [] 6610917Sbrandon.potter@amd.com 676908SBrad.Beckmann@amd.com # 686908SBrad.Beckmann@amd.com # The ruby network creation expects the list of nodes in the system to be 696908SBrad.Beckmann@amd.com # consistent with the NetDest list. Therefore the l1 controller nodes must be 706908SBrad.Beckmann@amd.com # listed before the directory nodes and directory nodes before dma nodes, etc. 716908SBrad.Beckmann@amd.com # 726908SBrad.Beckmann@amd.com l1_cntrl_nodes = [] 736908SBrad.Beckmann@amd.com l2_cntrl_nodes = [] 746908SBrad.Beckmann@amd.com dma_cntrl_nodes = [] 756908SBrad.Beckmann@amd.com 766908SBrad.Beckmann@amd.com # 776908SBrad.Beckmann@amd.com # Must create the individual controllers before the network to ensure the 786908SBrad.Beckmann@amd.com # controller constructors are called before the network constructor 796908SBrad.Beckmann@amd.com # 807564SBrad.Beckmann@amd.com l2_bits = int(math.log(options.num_l2caches, 2)) 818180SBrad.Beckmann@amd.com block_size_bits = int(math.log(options.cacheline_size, 2)) 8210917Sbrandon.potter@amd.com 8313731Sandreas.sandberg@arm.com for i in range(options.num_cpus): 846908SBrad.Beckmann@amd.com # 856908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 866908SBrad.Beckmann@amd.com # 876908SBrad.Beckmann@amd.com l1i_cache = L1Cache(size = options.l1i_size, 888180SBrad.Beckmann@amd.com assoc = options.l1i_assoc, 898180SBrad.Beckmann@amd.com start_index_bit = block_size_bits) 906908SBrad.Beckmann@amd.com l1d_cache = L1Cache(size = options.l1d_size, 918180SBrad.Beckmann@amd.com assoc = options.l1d_assoc, 928180SBrad.Beckmann@amd.com start_index_bit = block_size_bits) 936908SBrad.Beckmann@amd.com 9411266SBrad.Beckmann@amd.com # the ruby random tester reuses num_cpus to specify the 9511266SBrad.Beckmann@amd.com # number of cpu ports connected to the tester object, which 9611266SBrad.Beckmann@amd.com # is stored in system.cpu. because there is only ever one 9711266SBrad.Beckmann@amd.com # tester object, num_cpus is not necessarily equal to the 9811266SBrad.Beckmann@amd.com # size of system.cpu; therefore if len(system.cpu) == 1 9911266SBrad.Beckmann@amd.com # we use system.cpu[0] to set the clk_domain, thereby ensuring 10011266SBrad.Beckmann@amd.com # we don't index off the end of the cpu list. 10111266SBrad.Beckmann@amd.com if len(system.cpu) == 1: 10211266SBrad.Beckmann@amd.com clk_domain = system.cpu[0].clk_domain 10311266SBrad.Beckmann@amd.com else: 10411266SBrad.Beckmann@amd.com clk_domain = system.cpu[i].clk_domain 1057539SBrad.Beckmann@amd.com 10611266SBrad.Beckmann@amd.com l1_cntrl = L1Cache_Controller(version=i, L1Icache=l1i_cache, 10711266SBrad.Beckmann@amd.com L1Dcache=l1d_cache, 10811266SBrad.Beckmann@amd.com l2_select_num_bits=l2_bits, 10911266SBrad.Beckmann@amd.com N_tokens=n_tokens, 11011266SBrad.Beckmann@amd.com retry_threshold=options.l1_retries, 11111266SBrad.Beckmann@amd.com fixed_timeout_latency=\ 11211266SBrad.Beckmann@amd.com options.timeout_latency, 11311266SBrad.Beckmann@amd.com dynamic_timeout_enabled=\ 11411266SBrad.Beckmann@amd.com not options.disable_dyn_timeouts, 11511266SBrad.Beckmann@amd.com no_mig_atomic=not \ 11611266SBrad.Beckmann@amd.com options.allow_atomic_migration, 11711266SBrad.Beckmann@amd.com send_evictions=send_evicts(options), 11811266SBrad.Beckmann@amd.com transitions_per_cycle=options.ports, 11911266SBrad.Beckmann@amd.com clk_domain=clk_domain, 12011266SBrad.Beckmann@amd.com ruby_system=ruby_system) 12111266SBrad.Beckmann@amd.com 12211266SBrad.Beckmann@amd.com cpu_seq = RubySequencer(version=i, icache=l1i_cache, 12311266SBrad.Beckmann@amd.com dcache=l1d_cache, clk_domain=clk_domain, 12411266SBrad.Beckmann@amd.com ruby_system=ruby_system) 1258322Ssteve.reinhardt@amd.com 1268322Ssteve.reinhardt@amd.com l1_cntrl.sequencer = cpu_seq 12710116Snilay@cs.wisc.edu exec("ruby_system.l1_cntrl%d = l1_cntrl" % i) 1288322Ssteve.reinhardt@amd.com 1296908SBrad.Beckmann@amd.com # Add controllers and sequencers to the appropriate lists 1306908SBrad.Beckmann@amd.com cpu_sequencers.append(cpu_seq) 1316908SBrad.Beckmann@amd.com l1_cntrl_nodes.append(l1_cntrl) 1326908SBrad.Beckmann@amd.com 13310311Snilay@cs.wisc.edu # Connect the L1 controllers and the network 13411022Sjthestness@gmail.com l1_cntrl.requestFromL1Cache = MessageBuffer() 13511022Sjthestness@gmail.com l1_cntrl.requestFromL1Cache.master = ruby_system.network.slave 13611022Sjthestness@gmail.com l1_cntrl.responseFromL1Cache = MessageBuffer() 13711022Sjthestness@gmail.com l1_cntrl.responseFromL1Cache.master = ruby_system.network.slave 13811022Sjthestness@gmail.com l1_cntrl.persistentFromL1Cache = MessageBuffer(ordered = True) 13911022Sjthestness@gmail.com l1_cntrl.persistentFromL1Cache.master = ruby_system.network.slave 14010311Snilay@cs.wisc.edu 14111022Sjthestness@gmail.com l1_cntrl.mandatoryQueue = MessageBuffer() 14211022Sjthestness@gmail.com l1_cntrl.requestToL1Cache = MessageBuffer() 14311022Sjthestness@gmail.com l1_cntrl.requestToL1Cache.slave = ruby_system.network.master 14411022Sjthestness@gmail.com l1_cntrl.responseToL1Cache = MessageBuffer() 14511022Sjthestness@gmail.com l1_cntrl.responseToL1Cache.slave = ruby_system.network.master 14611022Sjthestness@gmail.com l1_cntrl.persistentToL1Cache = MessageBuffer(ordered = True) 14711022Sjthestness@gmail.com l1_cntrl.persistentToL1Cache.slave = ruby_system.network.master 14810311Snilay@cs.wisc.edu 14910311Snilay@cs.wisc.edu 1508180SBrad.Beckmann@amd.com l2_index_start = block_size_bits + l2_bits 1518180SBrad.Beckmann@amd.com 15213731Sandreas.sandberg@arm.com for i in range(options.num_l2caches): 1536908SBrad.Beckmann@amd.com # 1546908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 1556908SBrad.Beckmann@amd.com # 1566908SBrad.Beckmann@amd.com l2_cache = L2Cache(size = options.l2_size, 1577564SBrad.Beckmann@amd.com assoc = options.l2_assoc, 1588180SBrad.Beckmann@amd.com start_index_bit = l2_index_start) 1596908SBrad.Beckmann@amd.com 1606908SBrad.Beckmann@amd.com l2_cntrl = L2Cache_Controller(version = i, 1619695Snilay@cs.wisc.edu L2cache = l2_cache, 1628436SBrad.Beckmann@amd.com N_tokens = n_tokens, 1639841Snilay@cs.wisc.edu transitions_per_cycle = options.ports, 1648436SBrad.Beckmann@amd.com ruby_system = ruby_system) 16510917Sbrandon.potter@amd.com 1669468Smalek.musleh@gmail.com exec("ruby_system.l2_cntrl%d = l2_cntrl" % i) 1676908SBrad.Beckmann@amd.com l2_cntrl_nodes.append(l2_cntrl) 1688257SBrad.Beckmann@amd.com 16910311Snilay@cs.wisc.edu # Connect the L2 controllers and the network 17011022Sjthestness@gmail.com l2_cntrl.GlobalRequestFromL2Cache = MessageBuffer() 17111022Sjthestness@gmail.com l2_cntrl.GlobalRequestFromL2Cache.master = ruby_system.network.slave 17211022Sjthestness@gmail.com l2_cntrl.L1RequestFromL2Cache = MessageBuffer() 17311022Sjthestness@gmail.com l2_cntrl.L1RequestFromL2Cache.master = ruby_system.network.slave 17411022Sjthestness@gmail.com l2_cntrl.responseFromL2Cache = MessageBuffer() 17511022Sjthestness@gmail.com l2_cntrl.responseFromL2Cache.master = ruby_system.network.slave 17610311Snilay@cs.wisc.edu 17711022Sjthestness@gmail.com l2_cntrl.GlobalRequestToL2Cache = MessageBuffer() 17811022Sjthestness@gmail.com l2_cntrl.GlobalRequestToL2Cache.slave = ruby_system.network.master 17911022Sjthestness@gmail.com l2_cntrl.L1RequestToL2Cache = MessageBuffer() 18011022Sjthestness@gmail.com l2_cntrl.L1RequestToL2Cache.slave = ruby_system.network.master 18111022Sjthestness@gmail.com l2_cntrl.responseToL2Cache = MessageBuffer() 18211022Sjthestness@gmail.com l2_cntrl.responseToL2Cache.slave = ruby_system.network.master 18311022Sjthestness@gmail.com l2_cntrl.persistentToL2Cache = MessageBuffer(ordered = True) 18411022Sjthestness@gmail.com l2_cntrl.persistentToL2Cache.slave = ruby_system.network.master 18510311Snilay@cs.wisc.edu 18610311Snilay@cs.wisc.edu 1879793Sakash.bagdia@arm.com # Run each of the ruby memory controllers at a ratio of the frequency of 1889793Sakash.bagdia@arm.com # the ruby system 1899793Sakash.bagdia@arm.com # clk_divider value is a fix to pass regression. 1909793Sakash.bagdia@arm.com ruby_system.memctrl_clk_domain = DerivedClockDomain( 1919793Sakash.bagdia@arm.com clk_domain=ruby_system.clk_domain, 1929793Sakash.bagdia@arm.com clk_divider=3) 1939793Sakash.bagdia@arm.com 19412598Snikos.nikoleris@arm.com mem_dir_cntrl_nodes, rom_dir_cntrl_node = create_directories( 19512976Snikos.nikoleris@arm.com options, bootmem, ruby_system, system) 19612598Snikos.nikoleris@arm.com dir_cntrl_nodes = mem_dir_cntrl_nodes[:] 19712598Snikos.nikoleris@arm.com if rom_dir_cntrl_node is not None: 19812598Snikos.nikoleris@arm.com dir_cntrl_nodes.append(rom_dir_cntrl_node) 19912065Snikos.nikoleris@arm.com for dir_cntrl in dir_cntrl_nodes: 20012065Snikos.nikoleris@arm.com dir_cntrl.l2_select_num_bits = l2_bits 20110311Snilay@cs.wisc.edu # Connect the directory controllers and the network 20211022Sjthestness@gmail.com dir_cntrl.requestToDir = MessageBuffer() 20311022Sjthestness@gmail.com dir_cntrl.requestToDir.slave = ruby_system.network.master 20411022Sjthestness@gmail.com dir_cntrl.responseToDir = MessageBuffer() 20511022Sjthestness@gmail.com dir_cntrl.responseToDir.slave = ruby_system.network.master 20611022Sjthestness@gmail.com dir_cntrl.persistentToDir = MessageBuffer(ordered = True) 20711022Sjthestness@gmail.com dir_cntrl.persistentToDir.slave = ruby_system.network.master 20811022Sjthestness@gmail.com dir_cntrl.dmaRequestToDir = MessageBuffer(ordered = True) 20911022Sjthestness@gmail.com dir_cntrl.dmaRequestToDir.slave = ruby_system.network.master 21010311Snilay@cs.wisc.edu 21111022Sjthestness@gmail.com dir_cntrl.requestFromDir = MessageBuffer() 21211022Sjthestness@gmail.com dir_cntrl.requestFromDir.master = ruby_system.network.slave 21311022Sjthestness@gmail.com dir_cntrl.responseFromDir = MessageBuffer() 21411022Sjthestness@gmail.com dir_cntrl.responseFromDir.master = ruby_system.network.slave 21511022Sjthestness@gmail.com dir_cntrl.persistentFromDir = MessageBuffer(ordered = True) 21611022Sjthestness@gmail.com dir_cntrl.persistentFromDir.master = ruby_system.network.slave 21711022Sjthestness@gmail.com dir_cntrl.dmaResponseFromDir = MessageBuffer(ordered = True) 21811022Sjthestness@gmail.com dir_cntrl.dmaResponseFromDir.master = ruby_system.network.slave 21911022Sjthestness@gmail.com dir_cntrl.responseFromMemory = MessageBuffer() 22010311Snilay@cs.wisc.edu 22110311Snilay@cs.wisc.edu 2228929Snilay@cs.wisc.edu for i, dma_port in enumerate(dma_ports): 2236908SBrad.Beckmann@amd.com # 2246908SBrad.Beckmann@amd.com # Create the Ruby objects associated with the dma controller 2256908SBrad.Beckmann@amd.com # 2266908SBrad.Beckmann@amd.com dma_seq = DMASequencer(version = i, 22710519Snilay@cs.wisc.edu ruby_system = ruby_system, 22810519Snilay@cs.wisc.edu slave = dma_port) 22910917Sbrandon.potter@amd.com 2306908SBrad.Beckmann@amd.com dma_cntrl = DMA_Controller(version = i, 2318477Snilay@cs.wisc.edu dma_sequencer = dma_seq, 2329841Snilay@cs.wisc.edu transitions_per_cycle = options.ports, 2338477Snilay@cs.wisc.edu ruby_system = ruby_system) 2346908SBrad.Beckmann@amd.com 2359468Smalek.musleh@gmail.com exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) 2366908SBrad.Beckmann@amd.com dma_cntrl_nodes.append(dma_cntrl) 2378257SBrad.Beckmann@amd.com 23810519Snilay@cs.wisc.edu # Connect the dma controller to the network 23911022Sjthestness@gmail.com dma_cntrl.mandatoryQueue = MessageBuffer() 24011022Sjthestness@gmail.com dma_cntrl.responseFromDir = MessageBuffer(ordered = True) 24111022Sjthestness@gmail.com dma_cntrl.responseFromDir.slave = ruby_system.network.master 24211022Sjthestness@gmail.com dma_cntrl.reqToDirectory = MessageBuffer() 24311022Sjthestness@gmail.com dma_cntrl.reqToDirectory.master = ruby_system.network.slave 24410519Snilay@cs.wisc.edu 2456908SBrad.Beckmann@amd.com all_cntrls = l1_cntrl_nodes + \ 2466908SBrad.Beckmann@amd.com l2_cntrl_nodes + \ 2476908SBrad.Beckmann@amd.com dir_cntrl_nodes + \ 2486908SBrad.Beckmann@amd.com dma_cntrl_nodes 2496908SBrad.Beckmann@amd.com 25010519Snilay@cs.wisc.edu # Create the io controller and the sequencer 25110519Snilay@cs.wisc.edu if full_system: 25210519Snilay@cs.wisc.edu io_seq = DMASequencer(version=len(dma_ports), ruby_system=ruby_system) 25310519Snilay@cs.wisc.edu ruby_system._io_port = io_seq 25410519Snilay@cs.wisc.edu io_controller = DMA_Controller(version = len(dma_ports), 25510519Snilay@cs.wisc.edu dma_sequencer = io_seq, 25610519Snilay@cs.wisc.edu ruby_system = ruby_system) 25710519Snilay@cs.wisc.edu ruby_system.io_controller = io_controller 25810519Snilay@cs.wisc.edu 25910519Snilay@cs.wisc.edu # Connect the dma controller to the network 26011022Sjthestness@gmail.com io_controller.mandatoryQueue = MessageBuffer() 26111022Sjthestness@gmail.com io_controller.responseFromDir = MessageBuffer(ordered = True) 26211022Sjthestness@gmail.com io_controller.responseFromDir.slave = ruby_system.network.master 26311022Sjthestness@gmail.com io_controller.reqToDirectory = MessageBuffer() 26411022Sjthestness@gmail.com io_controller.reqToDirectory.master = ruby_system.network.slave 26510519Snilay@cs.wisc.edu 26610519Snilay@cs.wisc.edu all_cntrls = all_cntrls + [io_controller] 26710519Snilay@cs.wisc.edu 26811065Snilay@cs.wisc.edu ruby_system.network.number_of_virtual_networks = 6 2699100SBrad.Beckmann@amd.com topology = create_topology(all_cntrls, options) 27012598Snikos.nikoleris@arm.com return (cpu_sequencers, mem_dir_cntrl_nodes, topology) 271