Searched refs:SrcClockDomain (Results 51 - 59 of 59) sorted by relevance

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/gem5/configs/dram/
H A Dsweep.py97 system.clk_domain = SrcClockDomain(clock = '2.0GHz',
H A Dlow_power_sweep.py93 system.clk_domain = SrcClockDomain(clock = '2.0GHz',
H A Dlat_mem_rd.py105 system.clk_domain = SrcClockDomain(clock = '2.0GHz',
/gem5/configs/example/arm/
H A Dstarter_se.py99 self.clk_domain = SrcClockDomain(clock="1GHz",
H A Ddevices.py125 self.clk_domain = SrcClockDomain(clock=cpu_clock,
194 self.clk_domain = SrcClockDomain(clock="1GHz",
/gem5/tests/gem5/cpu_tests/
H A Drun.py124 system.clk_domain = SrcClockDomain()
/gem5/configs/example/
H A Dmemtest.py231 system.clk_domain = SrcClockDomain(clock = options.sys_clock,
H A Dmemcheck.py226 system.clk_domain = SrcClockDomain(clock = options.sys_clock,
/gem5/src/dev/arm/
H A DRealView.py62 from m5.objects.ClockDomain import SrcClockDomain
1029 clock24MHz = SrcClockDomain(clock="24MHz",

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