Searched hist:5241 (Results 1 - 6 of 6) sorted by relevance

/gem5/src/arch/x86/isa/
H A Dspecialize.isadiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.
H A Dmicroasm.isadiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.
H A Doperands.isadiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/
H A Dmove.pydiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.
/gem5/src/arch/x86/isa/microops/
H A Dregop.isadiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.
/gem5/src/arch/x86/isa/decoder/
H A Dtwo_byte_opcodes.isadiff 5241:a6602acdd046 Mon Nov 12 17:38:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the wrcr microop which writes a control register, and some control register work.

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