arch-x86: Adding warning for movnti

We are ignoring the non-temporal hint here, and implementing this
instruction as a cacheable instruction.

This change adds a warning to let user know about this workaround.

Change-Id: I2e40437a44282fe9cf7772a25a8870bd8729a6ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20428
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

x86: Replace the .serializing directive with .serialize_(before|after).

This makes it explicit which type of serialization you want, and also
makes it possible to make a macroop serialize before. The old
serializing directive was renamed .serialize_after in the microcode
assembler, and throughout the microcode implementation, and its
behavior is unchanged. More specifically, it still marks the last
microop within the macroop as IsSerializing and IsSerializeAfter.

The new .serialize_before directive does something similar and marks
the first microop as IsSerializing and IsSerializeBefore.

Change-Id: Ia53466c734c651c65400809de7ef903c4a6c3e7e
Reviewed-on: https://gem5-review.googlesource.com/9041
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

x86: Fix setting segment bases in real mode.

The data size used for actually writing the base value for the segment was the
default size, but really it should set the entire value without any possible
truncation.

X86: Mark serializing macroops and regular instructions as such.

copyright: Change HP copyright on x86 code to be more friendly

X86: Fix bugs in movd implementation.

Unfortunately my implementation of the movd instruction had two bugs.

In one case, when moving a 32-bit value into an xmm register, the
lower half of the xmm register was not zero extended.

The other case is that xmm was used instead of xmmlm as the source
for a register move. My test case didn't notice this at first
as it moved xmm0 to eax, which both have the same register
number.

X86: Implement movd_Vo_Edp on X86

This patch implements the movd_Vo_Edp series of instructions.

It addresses various concerns by Gabe Black about which file the
instruction belonged in, as well as supporting REX prefixed
instructions properly.

This instruction is needed for some of the spec2k benchmarks, most
notably bzip2.

X86: Implement MOVNTI.

X86: Fix the mov to segment selector in real mode instruction microcode.

X86: Set address size to 64 bits when generating addresses internally.

X86: Make rdcr use merge and the mov to control register instructions use the right operand size.

X86: Implement the mov to debug register intructions.

X86: Fix a few bugs with the segment register instructions in real mode.
Fix a few instances where the register form of zext was used where zexti was
intended. Also get rid of the 64 bit only rip relative addressed version since
64 bit and real mode are mutually exclusive.

X86: Do a merge for the zero extension microop.

X86: Create a SeqOp class of microops and make Br one of them.

style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs

X86: Fix the microcode for sign/zero extending moves that use high byte registers.

X86: Change how segment loading is performed.

X86: Fix a byte register indexing issue in the sign extending move from memory microcode.

X86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.

X86: Implement mov from control register.

X86: Reorganize segmentation and implement segment selector movs.

X86: Implement the wrcr microop which writes a control register, and some control register work.

X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0.

X86: Added some new versions of MOV and a new argument type tag.

X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.