Searched hist:50 (Results 51 - 75 of 671) sorted by relevance
| /gem5/src/systemc/ext/core/ | ||
| H A D | sc_join.hh | 12943:12c1004709d4 Mon Jun 18 20:50:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add the nonstandard sc_join class and sc_thread_handle type. Change-Id: I09905bad4797d9c456229afe601006ce16977394 Reviewed-on: https://gem5-review.googlesource.com/11353 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/src/dev/i2c/ | ||
| H A D | bus.cc | diff 12772:362544959c40 Mon Jun 04 12:50:00 EDT 2018 Nikos Nikoleris <nikos.nikoleris@arm.com> dev-arm: Fix the address range for some I/O devices Previously, many devices were incorrecty configured to respond to an address range of size 0xfff. This changes fixes this and sets it to 0x1000. Change-Id: I4b027a27adf60ceae4859e287d7f34443b398752 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11116 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/systemc/ | ||
| H A D | SConsopts | 12817:e634213487cd Tue May 01 20:50:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add a stubbed out sc_object class. Also add a SConsopt variable USE_SYSTEMC to hide systemc support until it's usable. Change-Id: Ibb37483432b147ee690a36bb5c8dd74f1c4c7ae4 Reviewed-on: https://gem5-review.googlesource.com/10821 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/tests/configs/ | ||
| H A D | dram-lowp.py | diff 13619:44b5224b2ff4 Mon Jan 28 11:50:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> tests: Add a helper to run external scripts Some tests are really just a wrapper around a test script in configs/. Add a helper method to wrap these scripts to make sure they are executed in a consistent environment. This wrapper sets up a global environment that is identical to that created by main() when it executes the script. Unlike the old wrappers, it updates the module search path to make relative imports work correctly in Python 3. Change-Id: Ie9f81ec4e2689aa8cf5ecb9fc8025d3534b5c9ca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/15976 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| H A D | learning-gem5-p1-simple.py | diff 13619:44b5224b2ff4 Mon Jan 28 11:50:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> tests: Add a helper to run external scripts Some tests are really just a wrapper around a test script in configs/. Add a helper method to wrap these scripts to make sure they are executed in a consistent environment. This wrapper sets up a global environment that is identical to that created by main() when it executes the script. Unlike the old wrappers, it updates the module search path to make relative imports work correctly in Python 3. Change-Id: Ie9f81ec4e2689aa8cf5ecb9fc8025d3534b5c9ca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/15976 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| H A D | memcheck.py | diff 13619:44b5224b2ff4 Mon Jan 28 11:50:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> tests: Add a helper to run external scripts Some tests are really just a wrapper around a test script in configs/. Add a helper method to wrap these scripts to make sure they are executed in a consistent environment. This wrapper sets up a global environment that is identical to that created by main() when it executes the script. Unlike the old wrappers, it updates the module search path to make relative imports work correctly in Python 3. Change-Id: Ie9f81ec4e2689aa8cf5ecb9fc8025d3534b5c9ca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/15976 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/base/ | ||
| H A D | coroutine.hh | diff 14067:2c3667b32607 Thu Aug 30 19:50:00 EDT 2018 Michiel W. van Tol <Michiel.VanTol@arm.com> base: Add argument to Coroutine class to not run on creation In some cases, the point where you create a Coroutine is not the same as where you want to start running it (and want it to switch back to). This leads to the unnecessary overhead of switching in and out of the Coroutine. This change adds an optional boolean argument to the constructor for the Coroutine class to allow for overriding the default behavior of running the Coroutine upon creation, which in specific cases can be used to avoid the unnecessary overhead and improve simulator performance. Change-Id: I044698f85e81ee4144208aee30d133bcb462d35d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18588 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | coroutine.test.cc | diff 14067:2c3667b32607 Thu Aug 30 19:50:00 EDT 2018 Michiel W. van Tol <Michiel.VanTol@arm.com> base: Add argument to Coroutine class to not run on creation In some cases, the point where you create a Coroutine is not the same as where you want to start running it (and want it to switch back to). This leads to the unnecessary overhead of switching in and out of the Coroutine. This change adds an optional boolean argument to the constructor for the Coroutine class to allow for overriding the default behavior of running the Coroutine upon creation, which in specific cases can be used to avoid the unnecessary overhead and improve simulator performance. Change-Id: I044698f85e81ee4144208aee30d133bcb462d35d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18588 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/ext/testlib/ | ||
| H A D | loader.py | diff 14141:b3ceff47211a Tue Jun 18 06:50:00 EDT 2019 Nikos Nikoleris <nikos.nikoleris@arm.com> tests: Refactor the Gem5Fixture to derive from UniqueFixture Gem5Fixture is used to define a fixture for building the gem5 binary. Most tests are expected to define their own Gem5Fixture, however, as some might depend on the same binary (e.g., ./build/ARM/gem5.opt), they will try to re-define a fixture for the same target. This patchset changes Gem5Fixture to derive from UniqueFixture. In addition, this patchset changes the way global fixtures are discovered to work with the new Gem5Fixture class. Instead of enumerating them when test definitions are loaded, we do so after the tests have been filtered according to specified tags (e.g., include opt variant, exclude fast, debug variants). Change-Id: Ie868a7e18ef6c3271f3c8a658229657cd43997cb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19251 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
| H A D | wrappers.py | diff 14141:b3ceff47211a Tue Jun 18 06:50:00 EDT 2019 Nikos Nikoleris <nikos.nikoleris@arm.com> tests: Refactor the Gem5Fixture to derive from UniqueFixture Gem5Fixture is used to define a fixture for building the gem5 binary. Most tests are expected to define their own Gem5Fixture, however, as some might depend on the same binary (e.g., ./build/ARM/gem5.opt), they will try to re-define a fixture for the same target. This patchset changes Gem5Fixture to derive from UniqueFixture. In addition, this patchset changes the way global fixtures are discovered to work with the new Gem5Fixture class. Instead of enumerating them when test definitions are loaded, we do so after the tests have been filtered according to specified tags (e.g., include opt variant, exclude fast, debug variants). Change-Id: Ie868a7e18ef6c3271f3c8a658229657cd43997cb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19251 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
| /gem5/tests/gem5/cpu_tests/ | ||
| H A D | test.py | diff 14142:e732d3191b7c Wed May 29 06:50:00 EDT 2019 Nikos Nikoleris <nikos.nikoleris@arm.com> tests: Add support for downloaded archive fixtures This changes add support for specifying fixtures that download archives and uncompress them to the desired directory. Change-Id: Ib3f6ee111b8d6130200507cbd170ecaf9fb39445 Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18988 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/ | ||
| H A D | config.ini | diff 11957:90bb43dfc028 Wed Mar 29 21:50:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update ARM FS stats. The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression. commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000 arm, kmi: Clear interrupts in KMI devices Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 10848:e61f847e74fd Sat May 23 08:50:00 EDT 2015 Andreas Sandberg <Andreas.Sandberg@ARM.com> arm, stats: Update stats to reflect changes to generic timer The addition of a virtual timer affects stats in minor and o3. |
| H A D | simout | diff 11957:90bb43dfc028 Wed Mar 29 21:50:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update ARM FS stats. The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression. commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000 arm, kmi: Clear interrupts in KMI devices Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 10848:e61f847e74fd Sat May 23 08:50:00 EDT 2015 Andreas Sandberg <Andreas.Sandberg@ARM.com> arm, stats: Update stats to reflect changes to generic timer The addition of a virtual timer affects stats in minor and o3. |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/ | ||
| H A D | config.ini | diff 11957:90bb43dfc028 Wed Mar 29 21:50:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update ARM FS stats. The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression. commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000 arm, kmi: Clear interrupts in KMI devices Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 10848:e61f847e74fd Sat May 23 08:50:00 EDT 2015 Andreas Sandberg <Andreas.Sandberg@ARM.com> arm, stats: Update stats to reflect changes to generic timer The addition of a virtual timer affects stats in minor and o3. |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/ | ||
| H A D | simerr | diff 11957:90bb43dfc028 Wed Mar 29 21:50:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update ARM FS stats. The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression. commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000 arm, kmi: Clear interrupts in KMI devices Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 9348:44d31345e360 Fri Nov 02 12:50:00 EDT 2012 Ali Saidi <Ali.Saidi@ARM.com> update stats for preceeding changes |
| H A D | system.terminal | diff 10242:cb4e86c17767 Sun Jun 22 17:33:00 EDT 2014 Steve Reinhardt <steve.reinhardt@amd.com> stats: update for O3 changes Mostly small differences in total ticks, but O3 stall causes shifted significantly. 30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower. |
| /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/ | ||
| H A D | system.terminal | diff 11957:90bb43dfc028 Wed Mar 29 21:50:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update ARM FS stats. The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression. commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000 arm, kmi: Clear interrupts in KMI devices Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 10242:cb4e86c17767 Sun Jun 22 17:33:00 EDT 2014 Steve Reinhardt <steve.reinhardt@amd.com> stats: update for O3 changes Mostly small differences in total ticks, but O3 stall causes shifted significantly. 30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower. |
| /gem5/src/arch/sparc/ | ||
| H A D | decoder.hh | diff 13583:f7482392b097 Thu Oct 18 20:50:00 EDT 2018 Gabe Black <gabeblack@google.com> sparc: Get rid of some register type definitions. These are IntReg, FloatReg, FloatRegBits, and MiscReg. These have been supplanted by the global types RegVal and FloatRegVal. Change-Id: I956abfc7b439b083403e1a0d01e0bb35020bde44 Reviewed-on: https://gem5-review.googlesource.com/c/13627 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> diff 11165:d90aec9435bd Fri Oct 09 15:50:00 EDT 2015 Rekai Gonzalez Alberquilla <Rekai.GonzalezAlberquilla@arm.com> isa: Add parameter to pick different decoder inside ISA The decoder is responsible for splitting instructions in micro operations (uops). Given that different micro architectures may split operations differently, this patch allows to specify which micro architecture each isa implements, so different cores in the system can split instructions differently, also decoupling uop splitting (microArch) from ISA (Arch). This is done making the decodification calls templates that receive a type 'DecoderFlavour' that maps the name of the operation to the class that implements it. This way there is only one selection point (converting the command line enum to the appropriate DecodeFeatures object). In addition, there is no explicit code replication: template instantiation hides that, and the compiler should be able to resolve a number of things at compile-time. |
| /gem5/tests/testing/ | ||
| H A D | results.py | diff 11542:ecd058e3dcbe Mon Jun 20 09:50:00 EDT 2016 Andreas Sandberg <andreas.sandberg@arm.com> tests: Split test results into running and verification The test base class already assumes that test cases consists of a run stage and a verification stage. Reflect this in the results class to make it possible to detect cases where a run was successful, but didn't verify. Change-Id: I31ef393e496671221c5408aca41649cd8dda74ca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> diff 11512:060fc1591151 Thu Jun 02 05:50:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> tests: add 'CHANGED' output to pickle viewer Change-Id: I64c69fde8657c273adea69122877c5348a4f867a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/dev/x86/ | ||
| H A D | I82094AA.py | diff 9162:019047ead23b Tue Aug 21 05:50:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Device: Remove overloaded pio_latency parameter This patch removes the overloading of the parameter, which seems both redundant, and possibly incorrect. The PciConfigAll now also uses a Param.Latency rather than a Param.Tick. For backwards compatibility it still sets the pio_latency to 1 tick. All the comments have also been updated to not state that it is in simticks when it is not necessarily the case. diff 6803:c647872c6590 Sat Dec 19 04:50:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a latency that describes how long an interrupt takes to propagate through the IO APIC. |
| /gem5/src/cpu/minor/ | ||
| H A D | func_unit.hh | 10259:ebb376f73dd2 Wed Jul 23 17:09:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> cpu: `Minor' in-order CPU model This patch contains a new CPU model named `Minor'. Minor models a four stage in-order execution pipeline (fetch lines, decompose into macroops, decompose macroops into microops, execute). The model was developed to support the ARM ISA but should be fixable to support all the remaining gem5 ISAs. It currently also works for Alpha, and regressions are included for ARM and Alpha (including Linux boot). Documentation for the model can be found in src/doc/inside-minor.doxygen and its internal operations can be visualised using the Minorview tool utils/minorview.py. Minor was designed to be fairly simple and not to engage in a lot of instruction annotation. As such, it currently has very few gathered stats and may lack other gem5 features. Minor is faster than the o3 model. Sample results: Benchmark | Stat host_seconds (s) ---------------+--------v--------v-------- (on ARM, opt) | simple | o3 | minor | timing | timing | timing ---------------+--------+--------+-------- 10.linux-boot | 169 | 1883 | 1075 10.mcf | 117 | 967 | 491 20.parser | 668 | 6315 | 3146 30.eon | 542 | 3413 | 2414 40.perlbmk | 2339 | 20905 | 11532 50.vortex | 122 | 1094 | 588 60.bzip2 | 2045 | 18061 | 9662 70.twolf | 207 | 2736 | 1036 |
| /gem5/src/cpu/ | ||
| H A D | timing_expr.hh | 10259:ebb376f73dd2 Wed Jul 23 17:09:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> cpu: `Minor' in-order CPU model This patch contains a new CPU model named `Minor'. Minor models a four stage in-order execution pipeline (fetch lines, decompose into macroops, decompose macroops into microops, execute). The model was developed to support the ARM ISA but should be fixable to support all the remaining gem5 ISAs. It currently also works for Alpha, and regressions are included for ARM and Alpha (including Linux boot). Documentation for the model can be found in src/doc/inside-minor.doxygen and its internal operations can be visualised using the Minorview tool utils/minorview.py. Minor was designed to be fairly simple and not to engage in a lot of instruction annotation. As such, it currently has very few gathered stats and may lack other gem5 features. Minor is faster than the o3 model. Sample results: Benchmark | Stat host_seconds (s) ---------------+--------v--------v-------- (on ARM, opt) | simple | o3 | minor | timing | timing | timing ---------------+--------+--------+-------- 10.linux-boot | 169 | 1883 | 1075 10.mcf | 117 | 967 | 491 20.parser | 668 | 6315 | 3146 30.eon | 542 | 3413 | 2414 40.perlbmk | 2339 | 20905 | 11532 50.vortex | 122 | 1094 | 588 60.bzip2 | 2045 | 18061 | 9662 70.twolf | 207 | 2736 | 1036 |
| /gem5/src/python/m5/internal/ | ||
| H A D | __init__.py | diff 4859:97c7749896a6 Fri Aug 03 01:50:00 EDT 2007 Nathan Binkert <nate@binkert.org> python: Improve support for python calling back to C++ member functions. Add support for declaring SimObjects to swig so their members can be wrapped. Make sim_object.i only contain declarations for SimObject. Create system.i to contain declarations for System. Update python code to properly call the C++ given the new changes. |
| /gem5/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/ | ||
| H A D | simerr | diff 9348:44d31345e360 Fri Nov 02 12:50:00 EDT 2012 Ali Saidi <Ali.Saidi@ARM.com> update stats for preceeding changes |
| /gem5/build_opts/ | ||
| H A D | ALPHA | diff 10259:ebb376f73dd2 Wed Jul 23 17:09:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> cpu: `Minor' in-order CPU model This patch contains a new CPU model named `Minor'. Minor models a four stage in-order execution pipeline (fetch lines, decompose into macroops, decompose macroops into microops, execute). The model was developed to support the ARM ISA but should be fixable to support all the remaining gem5 ISAs. It currently also works for Alpha, and regressions are included for ARM and Alpha (including Linux boot). Documentation for the model can be found in src/doc/inside-minor.doxygen and its internal operations can be visualised using the Minorview tool utils/minorview.py. Minor was designed to be fairly simple and not to engage in a lot of instruction annotation. As such, it currently has very few gathered stats and may lack other gem5 features. Minor is faster than the o3 model. Sample results: Benchmark | Stat host_seconds (s) ---------------+--------v--------v-------- (on ARM, opt) | simple | o3 | minor | timing | timing | timing ---------------+--------+--------+-------- 10.linux-boot | 169 | 1883 | 1075 10.mcf | 117 | 967 | 491 20.parser | 668 | 6315 | 3146 30.eon | 542 | 3413 | 2414 40.perlbmk | 2339 | 20905 | 11532 50.vortex | 122 | 1094 | 588 60.bzip2 | 2045 | 18061 | 9662 70.twolf | 207 | 2736 | 1036 |
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