1/* 2 * Copyright (c) 2012 Google 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_SPARC_DECODER_HH__ 32#define __ARCH_SPARC_DECODER_HH__ 33 34#include "arch/generic/decode_cache.hh" 35#include "arch/sparc/registers.hh" 36#include "arch/types.hh" 37#include "cpu/static_inst.hh" 38 39namespace SparcISA 40{ 41 42class ISA; 43class Decoder 44{ 45 protected: 46 // The extended machine instruction being generated 47 ExtMachInst emi; 48 bool instDone; 49 RegVal asi; 50 51 public: 52 Decoder(ISA* isa = nullptr) : instDone(false), asi(0) 53 {} 54 55 void process() {} 56 57 void 58 reset() 59 { 60 instDone = false; 61 } 62 63 // Use this to give data to the predecoder. This should be used 64 // when there is control flow. 65 void 66 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 67 { 68 emi = inst; 69 // The I bit, bit 13, is used to figure out where the ASI 70 // should come from. Use that in the ExtMachInst. This is 71 // slightly redundant, but it removes the need to put a condition 72 // into all the execute functions 73 if (inst & (1 << 13)) { 74 emi |= (static_cast<ExtMachInst>( 75 asi << (sizeof(MachInst) * 8))); 76 } else { 77 emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5)) 78 << (sizeof(MachInst) * 8)); 79 } 80 instDone = true; 81 } 82 83 bool 84 needMoreBytes() 85 { 86 return true; 87 } 88 89 bool 90 instReady() 91 { 92 return instDone; 93 } 94 95 void 96 setContext(RegVal _asi) 97 { 98 asi = _asi; 99 } 100 101 void takeOverFrom(Decoder *old) {} 102 103 protected: 104 /// A cache of decoded instruction objects. 105 static GenericISA::BasicDecodeCache defaultCache; 106 107 public: 108 StaticInstPtr decodeInst(ExtMachInst mach_inst); 109 110 /// Decode a machine instruction. 111 /// @param mach_inst The binary instruction to decode. 112 /// @retval A pointer to the corresponding StaticInst object. 113 StaticInstPtr 114 decode(ExtMachInst mach_inst, Addr addr) 115 { 116 return defaultCache.decode(this, mach_inst, addr); 117 } 118 119 StaticInstPtr 120 decode(SparcISA::PCState &nextPC) 121 { 122 if (!instDone) 123 return NULL; 124 instDone = false; 125 return decode(emi, nextPC.instAddr()); 126 } 127}; 128 129} // namespace SparcISA 130 131#endif // __ARCH_SPARC_DECODER_HH__ 132