Searched hist:2009 (Results 701 - 725 of 951) sorted by relevance
| /gem5/src/base/ | ||
| H A D | hostinfo.cc | diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh |
| /gem5/src/cpu/ | ||
| H A D | pc_event.hh | diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh |
| /gem5/src/dev/ | ||
| H A D | intel_8254_timer.cc | diff 6067:c633cdd5ca25 Sun Apr 19 06:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Keep track of what the initial count value was in the LAPIC timer. |
| H A D | mc146818.hh | diff 6620:ade9a088bb14 Thu Aug 20 03:42:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Make the real time clock actually keep track of time. |
| /gem5/src/arch/power/ | ||
| H A D | isa_traits.hh | 6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA This adds support for the 32-bit, big endian Power ISA. This supports both integer and floating point instructions based on the Power ISA Book I v2.06. |
| /gem5/util/m5/ | ||
| H A D | m5op_x86.S | 5790:9279812da5ee Wed Jan 07 03:05:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Set up support for adding m5 pseudo insts to a binary. |
| /gem5/src/mem/ruby/common/ | ||
| H A D | TypeDefines.hh | 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems. This was done with an automated process, so there could be things that were done in this tree in the past that didn't make it. One known regression is that atomic memory operations do not seem to work properly anymore. |
| /gem5/src/arch/arm/ | ||
| H A D | locked_mem.hh | 6019:76890d8b28f5 Sun Apr 05 21:53:00 EDT 2009 Stephen Hines <hines@cs.fsu.edu> arm: add ARM support to M5 |
| H A D | vtophys.cc | 6019:76890d8b28f5 Sun Apr 05 21:53:00 EDT 2009 Stephen Hines <hines@cs.fsu.edu> arm: add ARM support to M5 |
| H A D | interrupts.hh | 6757:d86d3d6e5326 Tue Nov 17 19:02:00 EST 2009 Ali Saidi <Ali.Saidi@ARM.com> ARM: Boilerplate full-system code. |
| /gem5/src/arch/power/isa/formats/ | ||
| H A D | unimp.isa | 6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA This adds support for the 32-bit, big endian Power ISA. This supports both integer and floating point instructions based on the Power ISA Book I v2.06. |
| H A D | basic.isa | 6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA This adds support for the 32-bit, big endian Power ISA. This supports both integer and floating point instructions based on the Power ISA Book I v2.06. |
| /gem5/src/arch/x86/ | ||
| H A D | types.hh | diff 6615:f0e4e63310e5 Tue Aug 18 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Decode three byte opcodes. diff 6437:ecebd7cccb06 Mon Aug 03 14:01:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement. diff 6329:5d8b91875859 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Add a registers.hh file as an ISA switched header. This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. diff 6215:9aed64c9f10f Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: use base/types.hh not inttypes.h or stdint.h |
| /gem5/src/dev/mips/ | ||
| H A D | malta_cchip.cc | diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh |
| /gem5/src/dev/sparc/ | ||
| H A D | dtod.cc | diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh |
| /gem5/src/mem/ | ||
| H A D | packet_access.hh | diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh |
| H A D | physical.hh | diff 6227:a17798f2a52c Fri Jun 05 02:21:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: clean up types, especially signed vs unsigned diff 6107:52a5e1c63380 Tue Apr 21 11:17:00 EDT 2009 Steve Reinhardt <steve.reinhardt@amd.com> Minor tweaks for future Ruby compatibility. diff 6102:7fbf97dc6540 Mon Apr 20 00:44:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Mem: Change isLlsc to isLLSC. diff 6076:e141cc7896ce Sun Apr 19 07:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Memory: Rename LOCKED for load locked store conditional to LLSC. |
| /gem5/src/sim/ | ||
| H A D | core.hh | diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh |
| /gem5/configs/common/ | ||
| H A D | cpu2000.py | diff 6028:137a2b89eed4 Wed Apr 15 03:52:00 EDT 2009 Steve Reinhardt <steve.reinhardt@amd.com> configs: Allow M5_CPU2000 env var to set CPU2K binary path. It would be nice to have a more comprehensive mechanism but this is a big improvement over manually editing the script. |
| /gem5/src/arch/arm/isa/formats/ | ||
| H A D | formats.isa | 6019:76890d8b28f5 Sun Apr 05 21:53:00 EDT 2009 Stephen Hines <hines@cs.fsu.edu> arm: add ARM support to M5 |
| /gem5/src/arch/mips/ | ||
| H A D | MipsSystem.py | diff 6654:4c84e771cca7 Tue Sep 22 18:24:00 EDT 2009 Nathan Binkert <nate@binkert.org> python: Move more code into m5.util allow SCons to use that code. Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. |
| /gem5/src/arch/sparc/linux/ | ||
| H A D | linux.hh | diff 6640:30d92d2b66a1 Wed Sep 16 01:36:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> Syscalls: Implement sysinfo() syscall. |
| /gem5/src/cpu/o3/ | ||
| H A D | inst_queue.hh | diff 6221:58a3c04e6344 Tue May 26 12:23:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: add a type for thread IDs and try to use it everywhere diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh diff 5999:3cf8e71257e0 Thu Mar 05 22:09:00 EST 2009 Nathan Binkert <nate@binkert.org> stats: Fix all stats usages to deal with template fixes |
| /gem5/src/cpu/simple/ | ||
| H A D | TimingSimpleCPU.py | diff 6654:4c84e771cca7 Tue Sep 22 18:24:00 EDT 2009 Nathan Binkert <nate@binkert.org> python: Move more code into m5.util allow SCons to use that code. Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. |
| /gem5/src/mem/cache/prefetch/ | ||
| H A D | tagged.cc | diff 5875:d82be3235ab4 Mon Feb 16 11:56:00 EST 2009 Steve Reinhardt <steve.reinhardt@amd.com> Fixes to get prefetching working again. Apparently we broke it with the cache rewrite and never noticed. Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part of these changes (and for inspiring me to work on the rest). Some other overdue cleanup on the prefetch code too. |
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