1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40#ifndef __MEM_PHYSICAL_HH__
41#define __MEM_PHYSICAL_HH__
42
43#include "base/addr_range_map.hh"
44#include "mem/packet.hh"
45
46/**
47 * Forward declaration to avoid header dependencies.
48 */
49class AbstractMemory;
50
51/**
52 * A single entry for the backing store.
53 */
54class BackingStoreEntry
55{
56  public:
57
58    /**
59     * Create a backing store entry. Don't worry about managing the memory
60     * pointers, because PhysicalMemory is responsible for that.
61     */
62    BackingStoreEntry(AddrRange range, uint8_t* pmem,
63                      bool conf_table_reported, bool in_addr_map, bool kvm_map)
64        : range(range), pmem(pmem), confTableReported(conf_table_reported),
65          inAddrMap(in_addr_map), kvmMap(kvm_map)
66        {}
67
68    /**
69     * The address range covered in the guest.
70     */
71     AddrRange range;
72
73    /**
74     * Pointer to the host memory this range maps to. This memory is the same
75     * size as the range field.
76     */
77     uint8_t* pmem;
78
79     /**
80      * Whether this memory should be reported to the configuration table
81      */
82     bool confTableReported;
83
84     /**
85      * Whether this memory should appear in the global address map
86      */
87     bool inAddrMap;
88
89     /**
90      * Whether KVM should map this memory into the guest address space during
91      * acceleration.
92      */
93     bool kvmMap;
94};
95
96/**
97 * The physical memory encapsulates all memories in the system and
98 * provides basic functionality for accessing those memories without
99 * going through the memory system and interconnect.
100 *
101 * The physical memory is also responsible for providing the host
102 * system backingstore used by the memories in the simulated guest
103 * system. When the system is created, the physical memory allocates
104 * the backing store based on the address ranges that are populated in
105 * the system, and does so independent of how those map to actual
106 * memory controllers. Thus, the physical memory completely abstracts
107 * the mapping of the backing store of the host system and the address
108 * mapping in the guest system. This enables us to arbitrarily change
109 * the number of memory controllers, and their address mapping, as
110 * long as the ranges stay the same.
111 */
112class PhysicalMemory : public Serializable
113{
114
115  private:
116
117    // Name for debugging
118    std::string _name;
119
120    // Global address map
121    AddrRangeMap<AbstractMemory*, 1> addrMap;
122
123    // All address-mapped memories
124    std::vector<AbstractMemory*> memories;
125
126    // The total memory size
127    uint64_t size;
128
129    // Let the user choose if we reserve swap space when calling mmap
130    const bool mmapUsingNoReserve;
131
132    // The physical memory used to provide the memory in the simulated
133    // system
134    std::vector<BackingStoreEntry> backingStore;
135
136    // Prevent copying
137    PhysicalMemory(const PhysicalMemory&);
138
139    // Prevent assignment
140    PhysicalMemory& operator=(const PhysicalMemory&);
141
142    /**
143     * Create the memory region providing the backing store for a
144     * given address range that corresponds to a set of memories in
145     * the simulated system.
146     *
147     * @param range The address range covered
148     * @param memories The memories this range maps to
149     * @param kvm_map Should KVM map this memory for the guest
150     */
151    void createBackingStore(AddrRange range,
152                            const std::vector<AbstractMemory*>& _memories,
153                            bool conf_table_reported,
154                            bool in_addr_map, bool kvm_map);
155
156  public:
157
158    /**
159     * Create a physical memory object, wrapping a number of memories.
160     */
161    PhysicalMemory(const std::string& _name,
162                   const std::vector<AbstractMemory*>& _memories,
163                   bool mmap_using_noreserve);
164
165    /**
166     * Unmap all the backing store we have used.
167     */
168    ~PhysicalMemory();
169
170    /**
171     * Return the name for debugging and for creation of sections for
172     * checkpointing.
173     */
174    const std::string name() const { return _name; }
175
176    /**
177     * Check if a physical address is within a range of a memory that
178     * is part of the global address map.
179     *
180     * @param addr A physical address
181     * @return Whether the address corresponds to a memory
182     */
183    bool isMemAddr(Addr addr) const;
184
185    /**
186     * Get the memory ranges for all memories that are to be reported
187     * to the configuration table. The ranges are merged before they
188     * are returned such that any interleaved ranges appear as a
189     * single range.
190     *
191     * @return All configuration table memory ranges
192     */
193    AddrRangeList getConfAddrRanges() const;
194
195    /**
196     * Get the total physical memory size.
197     *
198     * @return The sum of all memory sizes
199     */
200    uint64_t totalSize() const { return size; }
201
202     /**
203     * Get the pointers to the backing store for external host
204     * access. Note that memory in the guest should be accessed using
205     * access() or functionalAccess(). This interface is primarily
206     * intended for CPU models using hardware virtualization. Note
207     * that memories that are null are not present, and that the
208     * backing store may also contain memories that are not part of
209     * the OS-visible global address map and thus are allowed to
210     * overlap.
211     *
212     * @return Pointers to the memory backing store
213     */
214    std::vector<BackingStoreEntry> getBackingStore() const
215    { return backingStore; }
216
217    /**
218     * Perform an untimed memory access and update all the state
219     * (e.g. locked addresses) and statistics accordingly. The packet
220     * is turned into a response if required.
221     *
222     * @param pkt Packet performing the access
223     */
224    void access(PacketPtr pkt);
225
226    /**
227     * Perform an untimed memory read or write without changing
228     * anything but the memory itself. No stats are affected by this
229     * access. In addition to normal accesses this also facilitates
230     * print requests.
231     *
232     * @param pkt Packet performing the access
233     */
234    void functionalAccess(PacketPtr pkt);
235
236    /**
237     * Serialize all the memories in the system. This is independent
238     * of the logical memory layout, and the serialization only sees
239     * the contigous backing store, independent of how this maps to
240     * logical memories in the guest system.
241     *
242     * @param os stream to serialize to
243     */
244    void serialize(CheckpointOut &cp) const override;
245
246    /**
247     * Serialize a specific store.
248     *
249     * @param store_id Unique identifier of this backing store
250     * @param range The address range of this backing store
251     * @param pmem The host pointer to this backing store
252     */
253    void serializeStore(CheckpointOut &cp, unsigned int store_id,
254                        AddrRange range, uint8_t* pmem) const;
255
256    /**
257     * Unserialize the memories in the system. As with the
258     * serialization, this action is independent of how the address
259     * ranges are mapped to logical memories in the guest system.
260     */
261    void unserialize(CheckpointIn &cp) override;
262
263    /**
264     * Unserialize a specific backing store, identified by a section.
265     */
266    void unserializeStore(CheckpointIn &cp);
267
268};
269
270#endif //__MEM_PHYSICAL_HH__
271