Searched hist:2009 (Results 301 - 325 of 951) sorted by relevance

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/gem5/src/arch/x86/bios/
H A DACPI.pydiff 5825:da5f7e97958c Sun Feb 01 19:59:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Set/correct some default values for x86 parameters.
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/
H A Dbit_scan.pydiff 6344:b7104eda0795 Thu Jul 16 12:27:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix a number of places where the wrong form of a microop was used.
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/
H A Dxchg.pydiff 6088:c698cbf56cf1 Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of XCHG.
/gem5/src/arch/x86/isa/insts/system/
H A D__init__.pydiff 5933:8b9bc09b149c Wed Feb 25 13:21:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement CLTS.
/gem5/src/base/
H A Dchunk_generator.hhdiff 6227:a17798f2a52c Fri Jun 05 02:21:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: clean up types, especially signed vs unsigned
H A Dinet.ccdiff 6712:b95abe00dd9d Wed Nov 04 19:57:00 EST 2009 Nathan Binkert <nate@binkert.org> build: fix compile problems pointed out by gcc 4.4
diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 5782:ff12aefd2cc2 Tue Jan 06 10:36:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> INET: Add functions to header types to get offset in packet and start of payload; add function to split packet at last known header
/gem5/src/dev/mips/
H A DSConscriptdiff 6379:75d4aaf7dd54 Tue Jul 21 04:09:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Get MIPS_FS to compile, more style fixes.
Some breakage was from my BitUnion change, some was much older.
/gem5/src/mem/ruby/slicc_interface/
H A DAbstractCacheEntry.ccdiff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6284:a63d1dc4c820 Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: replace strings that were missed in original ruby import.
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/mem/slicc/symbols/
H A DVar.py6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc.
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".

Slicc can easily be run manually by using util/slicc
/gem5/src/arch/mips/
H A Dvtophys.ccdiff 6378:4a2ff62c3b4f Tue Jul 21 04:08:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Many style fixes.
White space, commented out code, some other minor fixes.
H A Dkernel_stats.hhdiff 6378:4a2ff62c3b4f Tue Jul 21 04:08:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Many style fixes.
White space, commented out code, some other minor fixes.
/gem5/src/arch/x86/insts/
H A Dstatic_inst.ccdiff 6361:62de7e765286 Fri Jul 17 21:49:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Set up a named constant for the "fold bit" for int register indices.
diff 6359:1e4908b3e28e Fri Jul 17 03:29:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Shift some register flattening work into the decoder.
diff 5787:e3a6f53818fe Wed Jan 07 01:46:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Move the function that prints memory args into the inst base class.
diff 5785:5030d9fb0d70 Wed Jan 07 01:40:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Change indentation on microop disassembly.
/gem5/src/mem/ruby/common/
H A DConsumer.hhdiff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
diff 6149:ff34514cbf37 Mon May 11 13:38:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: Renamed Ruby's EventQueue to RubyEventQueue
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/arch/arm/
H A Dkernel_stats.hh6757:d86d3d6e5326 Tue Nov 17 19:02:00 EST 2009 Ali Saidi <Ali.Saidi@ARM.com> ARM: Boilerplate full-system code.
/gem5/src/kern/
H A Doperatingsystem.cc5795:72ce7502dc71 Sat Jan 17 18:56:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> Fix issue 326: glibc non-deterministic because it reads /proc
/gem5/ext/dnet/
H A Dip.h6017:7e310503019e Tue Mar 17 03:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: add ext to the includes path.
move dnet to the correct place so that we use this
/gem5/src/arch/x86/isa/insts/general_purpose/
H A Dcache_and_memory_management.pydiff 5920:5a9c976270d6 Wed Feb 25 13:19:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a basic prefetch instruction.
/gem5/src/arch/arm/insts/
H A Dbranch.hh6253:988a001820f8 Sun Jun 21 20:21:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Simplify the ISA desc by pulling some classes out of it.
/gem5/src/arch/power/insts/
H A Dinteger.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
H A Dfloating.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
H A Dcondition.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
H A Dmisc.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
/gem5/src/arch/sparc/
H A DSparcNativeTrace.py6365:a3037fa327a0 Mon Jul 20 02:54:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
/gem5/src/arch/x86/
H A DX86NativeTrace.py6365:a3037fa327a0 Mon Jul 20 02:54:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
/gem5/src/mem/slicc/
H A Dutil.py6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc.
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".

Slicc can easily be run manually by using util/slicc

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