1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license 11 * terms below provided that you ensure that this notice is replicated 12 * unmodified and in its entirety in all distributions of the software, 13 * modified or unmodified, in source code or in binary form. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions are 17 * met: redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer; 19 * redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution; 22 * neither the name of the copyright holders nor the names of its 23 * contributors may be used to endorse or promote products derived from 24 * this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * Authors: Gabe Black 39 */ 40 41#include "arch/x86/insts/static_inst.hh" 42 43#include "arch/x86/regs/segment.hh" 44#include "cpu/reg_class.hh" 45 46namespace X86ISA 47{ 48 void X86StaticInst::printMnemonic(std::ostream &os, 49 const char * mnemonic) const 50 { 51 ccprintf(os, " %s ", mnemonic); 52 } 53 54 void X86StaticInst::printMnemonic(std::ostream &os, 55 const char * instMnemonic, const char * mnemonic) const 56 { 57 ccprintf(os, " %s : %s ", instMnemonic, mnemonic); 58 } 59 60 void X86StaticInst::printSegment(std::ostream &os, int segment) const 61 { 62 switch (segment) 63 { 64 case SEGMENT_REG_ES: 65 ccprintf(os, "ES"); 66 break; 67 case SEGMENT_REG_CS: 68 ccprintf(os, "CS"); 69 break; 70 case SEGMENT_REG_SS: 71 ccprintf(os, "SS"); 72 break; 73 case SEGMENT_REG_DS: 74 ccprintf(os, "DS"); 75 break; 76 case SEGMENT_REG_FS: 77 ccprintf(os, "FS"); 78 break; 79 case SEGMENT_REG_GS: 80 ccprintf(os, "GS"); 81 break; 82 case SEGMENT_REG_HS: 83 ccprintf(os, "HS"); 84 break; 85 case SEGMENT_REG_TSL: 86 ccprintf(os, "TSL"); 87 break; 88 case SEGMENT_REG_TSG: 89 ccprintf(os, "TSG"); 90 break; 91 case SEGMENT_REG_LS: 92 ccprintf(os, "LS"); 93 break; 94 case SEGMENT_REG_MS: 95 ccprintf(os, "MS"); 96 break; 97 case SYS_SEGMENT_REG_TR: 98 ccprintf(os, "TR"); 99 break; 100 case SYS_SEGMENT_REG_IDTR: 101 ccprintf(os, "IDTR"); 102 break; 103 default: 104 panic("Unrecognized segment %d\n", segment); 105 } 106 } 107 108 void 109 X86StaticInst::printSrcReg(std::ostream &os, int reg, int size) const 110 { 111 if (_numSrcRegs > reg) 112 printReg(os, _srcRegIdx[reg], size); 113 } 114 115 void 116 X86StaticInst::printDestReg(std::ostream &os, int reg, int size) const 117 { 118 if (_numDestRegs > reg) 119 printReg(os, _destRegIdx[reg], size); 120 } 121 122 void 123 X86StaticInst::printReg(std::ostream &os, RegId reg, int size) const 124 { 125 assert(size == 1 || size == 2 || size == 4 || size == 8); 126 static const char * abcdFormats[9] = 127 {"", "%s", "%sx", "", "e%sx", "", "", "", "r%sx"}; 128 static const char * piFormats[9] = 129 {"", "%s", "%s", "", "e%s", "", "", "", "r%s"}; 130 static const char * longFormats[9] = 131 {"", "r%sb", "r%sw", "", "r%sd", "", "", "", "r%s"}; 132 static const char * microFormats[9] = 133 {"", "t%db", "t%dw", "", "t%dd", "", "", "", "t%d"}; 134 135 RegIndex reg_idx = reg.index(); 136 137 if (reg.isIntReg()) { 138 const char * suffix = ""; 139 bool fold = reg_idx & IntFoldBit; 140 reg_idx &= ~IntFoldBit; 141 142 if (fold) 143 suffix = "h"; 144 else if (reg_idx < 8 && size == 1) 145 suffix = "l"; 146 147 switch (reg_idx) { 148 case INTREG_RAX: 149 ccprintf(os, abcdFormats[size], "a"); 150 break; 151 case INTREG_RBX: 152 ccprintf(os, abcdFormats[size], "b"); 153 break; 154 case INTREG_RCX: 155 ccprintf(os, abcdFormats[size], "c"); 156 break; 157 case INTREG_RDX: 158 ccprintf(os, abcdFormats[size], "d"); 159 break; 160 case INTREG_RSP: 161 ccprintf(os, piFormats[size], "sp"); 162 break; 163 case INTREG_RBP: 164 ccprintf(os, piFormats[size], "bp"); 165 break; 166 case INTREG_RSI: 167 ccprintf(os, piFormats[size], "si"); 168 break; 169 case INTREG_RDI: 170 ccprintf(os, piFormats[size], "di"); 171 break; 172 case INTREG_R8W: 173 ccprintf(os, longFormats[size], "8"); 174 break; 175 case INTREG_R9W: 176 ccprintf(os, longFormats[size], "9"); 177 break; 178 case INTREG_R10W: 179 ccprintf(os, longFormats[size], "10"); 180 break; 181 case INTREG_R11W: 182 ccprintf(os, longFormats[size], "11"); 183 break; 184 case INTREG_R12W: 185 ccprintf(os, longFormats[size], "12"); 186 break; 187 case INTREG_R13W: 188 ccprintf(os, longFormats[size], "13"); 189 break; 190 case INTREG_R14W: 191 ccprintf(os, longFormats[size], "14"); 192 break; 193 case INTREG_R15W: 194 ccprintf(os, longFormats[size], "15"); 195 break; 196 default: 197 ccprintf(os, microFormats[size], reg_idx - NUM_INTREGS); 198 } 199 ccprintf(os, suffix); 200 201 } else if (reg.isFloatReg()) { 202 if (reg_idx < NumMMXRegs) { 203 ccprintf(os, "%%mmx%d", reg_idx); 204 return; 205 } 206 reg_idx -= NumMMXRegs; 207 if (reg_idx < NumXMMRegs * 2) { 208 ccprintf(os, "%%xmm%d_%s", reg_idx / 2, 209 (reg_idx % 2) ? "high": "low"); 210 return; 211 } 212 reg_idx -= NumXMMRegs * 2; 213 if (reg_idx < NumMicroFpRegs) { 214 ccprintf(os, "%%ufp%d", reg_idx); 215 return; 216 } 217 reg_idx -= NumMicroFpRegs; 218 ccprintf(os, "%%st(%d)", reg_idx); 219 220 } else if (reg.isCCReg()) { 221 ccprintf(os, "%%cc%d", reg_idx); 222 223 } else if (reg.isMiscReg()) { 224 switch (reg_idx) { 225 default: 226 ccprintf(os, "%%ctrl%d", reg_idx); 227 } 228 } 229 } 230 231 void X86StaticInst::printMem(std::ostream &os, uint8_t segment, 232 uint8_t scale, RegIndex index, RegIndex base, 233 uint64_t disp, uint8_t addressSize, bool rip) const 234 { 235 bool someAddr = false; 236 printSegment(os, segment); 237 os << ":["; 238 if (rip) { 239 os << "rip"; 240 someAddr = true; 241 } else { 242 if (scale != 0 && index != ZeroReg) 243 { 244 if (scale != 1) 245 ccprintf(os, "%d*", scale); 246 printReg(os, InstRegIndex(index), addressSize); 247 someAddr = true; 248 } 249 if (base != ZeroReg) 250 { 251 if (someAddr) 252 os << " + "; 253 printReg(os, InstRegIndex(base), addressSize); 254 someAddr = true; 255 } 256 } 257 if (disp != 0) 258 { 259 if (someAddr) 260 os << " + "; 261 ccprintf(os, "%#x", disp); 262 someAddr = true; 263 } 264 if (!someAddr) 265 os << "0"; 266 os << "]"; 267 } 268 269 std::string X86StaticInst::generateDisassembly(Addr pc, 270 const SymbolTable *symtab) const 271 { 272 std::stringstream ss; 273 274 printMnemonic(ss, mnemonic); 275 276 return ss.str(); 277 } 278} 279