Searched defs:override (Results 1 - 25 of 324) sorted by relevance

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/gem5/src/arch/riscv/insts/
H A Dcompressed.hh52 Addr pc, const SymbolTable *symtab) const override; member in class:RiscvISA::CompRegOp
/gem5/src/cpu/simple/
H A Dnoncaching.hh55 void verifyMemoryMode() const override; member in class:NonCachingSimpleCPU
58 Tick sendPacket(MasterPort &port, const PacketPtr &pkt) override; member in class:NonCachingSimpleCPU
/gem5/src/mem/qos/
H A Dturnaround_policy_ideal.hh67 virtual MemCtrl::BusState selectBusState() override; member in class:QoS::TurnaroundPolicyIdeal
/gem5/src/arch/alpha/
H A Dprocess.hh46 void unserialize(CheckpointIn &cp) override; member in class:AlphaProcess
47 void initState() override; member in class:AlphaProcess
52 RegVal getSyscallArg(ThreadContext *tc, int &i) override; member in class:AlphaProcess
55 void setSyscallArg(ThreadContext *tc, int i, RegVal val) override; member in class:AlphaProcess
57 SyscallReturn return_value) override; member in class:AlphaProcess
/gem5/src/cpu/pred/
H A Dmultiperspective_perceptron_64KB.hh47 void createSpecs() override; member in class:MultiperspectivePerceptron64KB
H A Dmultiperspective_perceptron_8KB.hh47 void createSpecs() override; member in class:MultiperspectivePerceptron8KB
/gem5/src/mem/cache/
H A Dnoncoherent_cache.hh75 PacketList &writebacks) override; member in class:NoncoherentCache
79 Tick request_time) override; member in class:NoncoherentCache
81 void recvTimingReq(PacketPtr pkt) override; member in class:NoncoherentCache
84 Tick forward_time) override; member in class:NoncoherentCache
86 void doWritebacksAtomic(PacketList& writebacks) override; member in class:NoncoherentCache
89 CacheBlk *blk) override; member in class:NoncoherentCache
91 void recvTimingResp(PacketPtr pkt) override; member in class:NoncoherentCache
102 PacketList &writebacks) override; member in class:NoncoherentCache
104 Tick recvAtomic(PacketPtr pkt) override; member in class:NoncoherentCache
110 void functionalAccess(PacketPtr pkt, bool from_cpu_side) override; member in class:NoncoherentCache
114 bool pending_downgrade = false) override; member in class:NoncoherentCache
124 bool is_whole_line_write) const override; member in class:NoncoherentCache
126 M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override; member in class:NoncoherentCache
[all...]
H A Dcache.hh91 PacketList &writebacks) override; member in class:Cache
94 Tick request_time) override; member in class:Cache
98 Tick request_time) override; member in class:Cache
100 void recvTimingReq(PacketPtr pkt) override; member in class:Cache
102 void doWritebacks(PacketList& writebacks, Tick forward_time) override; member in class:Cache
104 void doWritebacksAtomic(PacketList& writebacks) override; member in class:Cache
107 CacheBlk *blk) override; member in class:Cache
109 void recvTimingSnoopReq(PacketPtr pkt) override; member in class:Cache
111 void recvTimingSnoopResp(PacketPtr pkt) override; member in class:Cache
114 PacketList &writebacks) override; member in class:Cache
116 Tick recvAtomic(PacketPtr pkt) override; member in class:Cache
118 Tick recvAtomicSnoop(PacketPtr pkt) override; member in class:Cache
122 bool pending_downgrade = false) override; member in class:Cache
142 M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override; member in class:Cache
154 bool is_whole_line_write) const override; member in class:Cache
174 bool sendMSHRQueuePacket(MSHR* mshr) override; member in class:Cache
[all...]
/gem5/src/mem/cache/prefetch/
H A Dmulti.hh54 void setCache(BaseCache *_cache) override; member in class:MultiPrefetcher
55 PacketPtr getPacket() override; member in class:MultiPrefetcher
56 Tick nextPrefetchReadyTime() const override; member in class:MultiPrefetcher
H A Dtagged.hh55 std::vector<AddrPriority> &addresses) override; member in class:TaggedPrefetcher
/gem5/src/mem/
H A Dsecure_port_proxy.hh75 bool tryReadBlob(Addr addr, void *p, int size) const override; member in class:SecurePortProxy
76 bool tryWriteBlob(Addr addr, const void *p, int size) const override; member in class:SecurePortProxy
77 bool tryMemsetBlob(Addr addr, uint8_t val, int size) const override; member in class:SecurePortProxy
H A Dfs_translating_port_proxy.hh91 bool tryReadBlob(Addr addr, void *p, int size) const override; member in class:FSTranslatingPortProxy
95 bool tryWriteBlob(Addr addr, const void *p, int size) const override; member in class:FSTranslatingPortProxy
100 bool tryMemsetBlob(Addr address, uint8_t v, int size) const override; member in class:FSTranslatingPortProxy
/gem5/src/base/filters/
H A Dh3_bloom_filter.hh52 int hash(Addr addr, int hash_number) const override; member in class:BloomFilter::H3
H A Dbulk_bloom_filter.hh53 int hash(Addr addr, int hash_number) const override; member in class:BloomFilter::Bulk
H A Dmulti_bloom_filter.hh54 void clear() override; member in class:BloomFilter::Multi
55 void set(Addr addr) override; member in class:BloomFilter::Multi
56 void unset(Addr addr) override; member in class:BloomFilter::Multi
58 void merge(const Base* other) override; member in class:BloomFilter::Multi
59 bool isSet(Addr addr) const override; member in class:BloomFilter::Multi
60 int getCount(Addr addr) const override; member in class:BloomFilter::Multi
61 int getTotalCount() const override; member in class:BloomFilter::Multi
/gem5/ext/nomali/lib/
H A Dmali_t7xx.hh35 void setupControlIdRegisters(RegVector &regs) override; member in class:NoMali::MaliT7xxBase
H A Djobcontrol.hh50 void reset() override; member in class:NoMali::JobControl
52 uint32_t readReg(RegAddr idx) override; member in class:NoMali::JobControl
53 void writeReg(RegAddr idx, uint32_t value) override; member in class:NoMali::JobControl
55 uint32_t readRegRaw(RegAddr idx) override; member in class:NoMali::JobControl
56 void writeRegRaw(RegAddr idx, uint32_t value) override; member in class:NoMali::JobControl
87 void onInterrupt(int set) override; member in class:NoMali::JobControl
H A Dmmu.hh48 void reset() override; member in class:NoMali::MMU
50 uint32_t readReg(RegAddr idx) override; member in class:NoMali::MMU
51 void writeReg(RegAddr idx, uint32_t value) override; member in class:NoMali::MMU
53 uint32_t readRegRaw(RegAddr idx) override; member in class:NoMali::MMU
54 void writeRegRaw(RegAddr idx, uint32_t value) override; member in class:NoMali::MMU
57 void onInterrupt(int set) override; member in class:NoMali::MMU
/gem5/src/arch/hsail/insts/
H A Dgpu_static_inst.hh57 void generateDisassembly() override; member in class:HsailISA::HsailGPUStaticInst
/gem5/src/dev/serial/
H A Dserial.hh155 uint8_t readData() override; member in class:SerialNullDevice
H A Dsimple.hh54 Tick read(PacketPtr pkt) override; member in class:SimpleUart
55 Tick write(PacketPtr pkt) override; member in class:SimpleUart
/gem5/src/cpu/testers/traffic_gen/
H A Dpygen.hh60 std::shared_ptr<BaseGen> nextGenerator() override; member in class:PyTrafficGen
/gem5/src/dev/ps2/
H A Dkeyboard.hh64 void serialize(CheckpointOut &cp) const override; member in class:PS2Keyboard
65 void unserialize(CheckpointIn &cp) override; member in class:PS2Keyboard
68 bool recv(const std::vector<uint8_t> &data) override; member in class:PS2Keyboard
71 void keyPress(uint32_t key, bool down) override; member in class:PS2Keyboard
/gem5/src/mem/cache/tags/indexing_policies/
H A Dset_associative.hh119 override; member in class:SetAssociative
129 override; member in class:SetAssociative
/gem5/src/arch/riscv/
H A Dprocess.hh54 RegVal getSyscallArg(ThreadContext *tc, int &i) override; member in class:RiscvProcess
57 void setSyscallArg(ThreadContext *tc, int i, RegVal val) override; member in class:RiscvProcess
59 SyscallReturn return_value) override; member in class:RiscvProcess
68 void initState() override; member in class:RiscvProcess64
75 void initState() override; member in class:RiscvProcess32

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