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12406:86bde4a026b5 |
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22-Dec-2017 |
Gabe Black <gabeblack@google.com> |
arch,cpu: "virtualize" the TLB interface.
CPUs have historically instantiated the architecture specific version of the TLBs to avoid a virtual function call, making them a little bit more dependent on what the current ISA is. Some simple performance measurement, the x86 twolf regression on the atomic CPU, shows that there isn't actually any performance benefit, and if anything the simulator goes slightly faster (although still within margin of error) when the TLB functions are virtual.
This change switches everything outside of the architectures themselves to use the generic BaseTLB type, and then inside the ISA for them to cast that to their architecture specific type to call into architecture specific interfaces.
The ARM TLB needed the most adjustment since it was using non-standard translation function signatures. Specifically, they all took an extra "type" parameter which defaulted to normal, and translateTiming returned a Fault. translateTiming actually doesn't need to return a Fault because everywhere that consumed it just stored it into a structure which it then deleted(?), and the fault is stored in the Translation object when the translation is done.
A little more work is needed to fully obviate the arch/tlb.hh header, so the TheISA::TLB type is still visible outside of the ISAs. Specifically, the TlbEntry type is used in the generic PageTable which lives in src/mem.
Change-Id: I51b68ee74411f9af778317eff222f9349d2ed575 Reviewed-on: https://gem5-review.googlesource.com/6921 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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9897:e105fbf799e7 |
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29-Sep-2013 |
Andreas Sandberg <andreas@sandberg.pp.se> |
arch: Add support for m5ops using mmapped IPRs
In order to support m5ops on virtualized CPUs, we need to either intercept hypercall instructions or provide a memory mapped m5ops interface. Since KVM does not normally pass the results of hypercalls to userspace, which makes that method unfeasible. This changeset introduces support for m5ops using memory mapped mmapped IPRs. This is implemented by adding a class of "generic" IPRs which are handled by architecture-independent code. Such IPRs always have bit 63 set and are handled by handleGenericIprRead() and handleGenericIprWrite(). Platform specific impementations of handleIprRead and handleIprWrite should use GenericISA::isGenericIprAccess to determine if an IPR address should be handled by the generic code instead of the architecture-specific code. Platforms that don't need their own IPR support can reuse GenericISA::handleIprRead() and GenericISA::handleIprWrite().
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9180:ee8d7a51651d |
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28-Aug-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Clock: Add a Cycles wrapper class and use where applicable
This patch addresses the comments and feedback on the preceding patch that reworks the clocks and now more clearly shows where cycles (relative cycle counts) are used to express time.
Instead of bumping the existing patch I chose to make this a separate patch, merely to try and focus the discussion around a smaller set of changes. The two patches will be pushed together though.
This changes done as part of this patch are mostly following directly from the introduction of the wrapper class, and change enough code to make things compile and run again. There are definitely more places where int/uint/Tick is still used to represent cycles, and it will take some time to chase them all down. Similarly, a lot of parameters should be changed from Param.Tick and Param.Unsigned to Param.Cycles.
In addition, the use of curTick is questionable as there should not be an absolute cycle. Potential solutions can be built on top of this patch. There is a similar situation in the o3 CPU where lastRunningCycle is currently counting in Cycles, and is still an absolute time. More discussion to be had in other words.
An additional change that would be appropriate in the future is to perform a similar wrapping of Tick and probably also introduce a Ticks class along with suitable operators for all these classes.
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8794:e2ac2b7164dd |
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18-Nov-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Get rid of includes of config/full_system.hh.
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8748:01be402c5bf1 |
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10-Oct-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SPARC: Turn on handleIprRead and handleIprWrite in SE in SPARC.
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8229:78bf55f23338 |
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15-Apr-2011 |
Nathan Binkert <nate@binkert.org> |
includes: sort all includes
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8105:906864dd0937 |
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02-Mar-2011 |
Gabe Black <gblack@eecs.umich.edu> |
Spelling: Fix the a spelling error by changing mmaped to mmapped.
There may not be a formally correct spelling for the past tense of mmap, but mmapped is the spelling Google doesn't try to autocorrect. This makes sense because it mirrors the past tense of map->mapped and not the past tense of cape->caped.
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