/gem5/src/systemc/tests/systemc/kernel/sc_time/test08/ |
H A D | test08.cpp | 45 sc_time t1( 1.2345, SC_NS ); 47 cout << t1; local
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/gem5/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/ |
H A D | test01.cpp | 46 top<int> t1( "t1" );
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/gem5/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/ |
H A D | test02.cpp | 46 top<bool> t1( "t1" );
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/gem5/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/ |
H A D | test03.cpp | 46 top<sc_logic> t1( "t1" );
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/gem5/src/systemc/tests/systemc/communication/sc_clock/test03/ |
H A D | test03.cpp | 47 sc_time t1( 8, SC_NS ); 50 sc_clock c1( "c1", t1, 0.1, t2 ); 54 sc_clock c2( "c2", t1, 0.1, t2, false );
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/gem5/src/systemc/tests/systemc/communication/sc_clock/test04/ |
H A D | test04.cpp | 47 sc_time t1( 8, SC_NS ); 50 sc_clock c1( "c1", t1, 0.1, t2 ); 51 sc_start(t1);
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/ |
H A D | ma_addr.S | 31 addi t1, base, offset; \ 32 insn t1, offset(base); \ 34 bne t1, t2, fail; \ 66 addi t1, base, offset; \ 68 lb t1, (offset - 1)(base); \ 69 beqz t1, fail; \ 70 lb t1, (offset + size)(base); \ 71 beqz t1, fail; \ 72 lb t1, (offset + 0)(base); \ 73 bnez t1, fai [all...] |
H A D | illegal.S | 27 li t1, (MSTATUS_MPP & -MSTATUS_MPP) * PRV_S 28 csrs mstatus, t1 31 bne t1, t2, pass 55 li t1, (MSTATUS_MPP & -MSTATUS_MPP) * PRV_S 56 csrs mstatus, t1 129 li t1, CAUSE_ILLEGAL_INSTRUCTION 131 bne t0, t1, fail 144 la t1, bad2 145 beq t0, t1, 2f 146 la t1, bad [all...] |
/gem5/src/systemc/tests/systemc/kernel/sc_time/test01/ |
H A D | test01.cpp | 47 sc_time t1; local 48 cout << t1 << endl; 80 sc_time t1; local 81 cout << t1 << endl; 180 sc_time t1; local 183 t1 = t2; 184 cout << t1 << endl; 187 t1 = t3; 188 cout << t1 << endl; 191 t1 200 sc_time t1; local 224 sc_time t1; local [all...] |
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64si/ |
H A D | sbreak.S | 36 li t1, CAUSE_BREAKPOINT 38 bne t0, t1, fail 39 la t1, do_break 41 bne t0, t1, fail
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uamt/ |
H A D | amoadd_d.S | 75 li t1, LOOP_COUNT // loop count 79 addi t1, t1, -1 80 bnez t1, 1b
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H A D | amoor_d.S | 73 li t1, 8 74 amoadd.d t1, t1, (t0) // get my array_index 77 add t0, t0, t1
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H A D | amoxor_d.S | 73 li t1, 8 74 amoadd.d t1, t1, (t0) // get my array_index 77 add t0, t0, t1
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H A D | amoand_d.S | 80 li t1, 8 81 amoadd.d t1, t1, (t0) // get my array_index 84 add t0, t0, t1
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H A D | amomax_d.S | 80 li t1, 8 81 amoadd.d t1, t1, (t0) // get my array_index 84 add t0, t0, t1
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/ |
H A D | jalr.S | 23 la t1, target_2 25 jalr t0, t1, 0 30 la t1, linkaddr_2 31 bne t0, t1, fail 50 la t1, 1f; \ 51 jr t1, -4; \
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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64samt/ |
H A D | sysfutex_d.S | 91 la t1, count_master 105 ld t2, (t1) 107 sd t2, (t1) 131 la t1, count_child 142 ld t2, (t1) 144 sd t2, (t1) 170 la t1, count_child 176 ld t1, (t1) 177 bne t1, t [all...] |
H A D | sysfutex1_d.S | 90 la t1, n_worker_threads 91 ld t1, (t1) 104 blt t0, t1, 1b
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/gem5/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/ |
H A D | proc_ctrl.cpp | 61 t1 = sc_get_current_process_handle();
68 sc_process_handle t1, t2;
local 88 t1.suspend();
92 t1.reset(); // Reset takes priority over suspend
96 t1.reset(); // Reset takes priority over suspend
100 t1.resume();
110 t1.reset();
119 t1.disable();
123 t1.reset(); // Reset takes priority over enable
129 t1 [all...] |
/gem5/src/systemc/tests/systemc/communication/sc_clock/test01/ |
H A D | test01.cpp | 51 sc_time t1( 8, SC_NS ); 60 sc_clock c3( "c3", t1 ); 62 sc_clock c4( "c4", t1, 0.1 ); 64 sc_clock c5( "c5", t1, 0.1, t2 ); 66 sc_clock c6( "c6", t1, 0.1, t2, false );
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/gem5/src/systemc/tests/systemc/1666-2011-compliance/throw_it/ |
H A D | throw_it.cpp | 48 t1 = sc_get_current_process_handle(); 71 sc_process_handle t1, t2, t3, t4, t5; member in struct:Top 84 t1.throw_it(ex); 88 sc_assert( t1.valid() ); 89 sc_assert( !t1.terminated() ); 102 t1.throw_it(ex); 103 sc_assert( t1.valid() ); 104 sc_assert( !t1.terminated() ); 115 t1.suspend(); 120 t1 [all...] |
/gem5/src/systemc/tests/systemc/communication/sc_clock/test02/ |
H A D | test02.cpp | 47 sc_time t1( 8, SC_NS ); 51 sc_clock c1( "c1", t1, 0.1, t2 ); 52 cout << "m_cur_val for c1( \"c1\", t1, 0.1, t2 ) is: "; 56 sc_clock c2( "c2", t1, 0.1, t2, false ); 57 cout << "m_cur_val for c2( \"c2\", t1, 0.1, t2, false ) is: "; 63 cout << "m_cur_val for c3( \"c3\", t1, 0.1, t2 ) is: "; 68 cout << "m_cur_val for c4( \"c4\", t1, 0.1, t2, false ) is: "; 73 cout << "m_cur_val for c5( \"c5\", t1, 0.1, t2 ) is: "; 78 cout << "m_cur_val for c6( \"c6\", t1, 0.1, t2, false ) is: ";
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/gem5/src/systemc/tests/systemc/bugs/bug_147853/ |
H A D | bug_147853.cpp | 25 Test t1("t1"); 29 t1.clk(clk);
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/gem5/src/cpu/ |
H A D | thread_context.cc | 65 RegVal t1 = one->readIntReg(i); local 67 if (t1 != t2) 69 i, t1, t2); 74 RegVal t1 = one->readFloatReg(i); local 76 if (t1 != t2) 78 i, t1, t2); 84 const TheISA::VecRegContainer& t1 = one->readVecReg(rid); local 86 if (t1 != t2) 88 i, t1, t2); 94 const TheISA::VecPredRegContainer& t1 local 102 RegVal t1 = one->readMiscRegNoEffect(i); local 111 RegVal t1 = one->readCCReg(i); local [all...] |
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ua/ |
H A D | test.S | 17 amoadd.w t0, t1, 0(a0) 19 //sc.w t0, t1, 0(a0)
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