Searched refs:ttbcr (Results 1 - 7 of 7) sorted by relevance

/gem5/src/arch/arm/
H A Dtable_walker.cc295 currState->ttbcr = currState->tc->readMiscReg(snsBankedIndex(
463 currState->vaddr_tainted, currState->ttbcr, mbits(currState->vaddr, 31,
464 32 - currState->ttbcr.n));
468 if (currState->ttbcr.n == 0 || !mbits(currState->vaddr, 31,
469 32 - currState->ttbcr.n)) {
472 if (haveSecurity && currState->ttbcr.pd0) {
492 if (haveSecurity && currState->ttbcr.pd1) {
509 currState->ttbcr.n = 0;
512 Addr l1desc_addr = mbits(ttbr, 31, 14 - currState->ttbcr.n) |
513 (bits(currState->vaddr, 31 - currState->ttbcr
[all...]
H A Disa.hh602 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR); local
606 if (ttbcr.eae)
618 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR); local
622 if (ttbcr.eae)
H A Dtlb.cc572 vaddr = purifyTaggedAddr(vaddr_tainted, tc, aarch64EL, ttbcr);
798 Addr vaddr = purifyTaggedAddr(vaddr_tainted, tc, aarch64EL, ttbcr);
1048 vaddr = purifyTaggedAddr(vaddr_tainted, tc, aarch64EL, ttbcr);
1322 ttbcr = tc->readMiscReg(MISCREG_TCR_EL1);
1323 uint64_t ttbr_asid = ttbcr.a1 ?
1327 (haveLargeAsid64 && ttbcr.as) ? 63 : 55, 48);
1332 ttbcr = tc->readMiscReg(MISCREG_TCR_EL2);
1337 ttbcr = tc->readMiscReg(MISCREG_TCR_EL3);
1370 ttbcr = tc->readMiscReg(snsBankedIndex(MISCREG_TTBCR, tc,
1376 snsBankedIndex(ttbcr
[all...]
H A Disa.cc247 TTBCR ttbcr = miscRegs[MISCREG_TTBCR_NS]; local
248 ttbcr.eae = 0;
249 miscRegs[MISCREG_TTBCR_NS] = ttbcr;
1742 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1748 if (haveLPAE && (ttbcr.eae || tranType & TLB::HypMode ||
1787 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1814 newVal = (newVal & ttbcrMask) | (ttbcr & (~ttbcrMask));
1824 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1826 if (ttbcr.eae) {
H A Dutility.cc221 TTBCR ttbcr = tc->readMiscReg(MISCREG_TTBCR); local
222 return ArmSystem::haveLPAE(tc) && ttbcr.eae;
H A Dtlb.hh419 TTBCR ttbcr; member in class:ArmISA::TLB
H A Dtable_walker.hh735 /** Cached copy of ttbcr/tcr as it existed when translation began */
737 TTBCR ttbcr; // AArch32 translations member in union:ArmISA::TableWalker::LongDescriptor::WalkerState::__anon1

Completed in 28 milliseconds