| /gem5/system/alpha/palcode/ |
| H A D | platform.S | 239 OSFmchk_TLEPstore_1(r14,r8,r4,r13,_tlepreg)
261 OSFcrd_TLEPstore_1(r14,r8,r4,r13,_tlepreg)
263 OSFcrd_TLEPstore_tlsb_1(r14,r8,r4,r13,_tlepreg)
265 OSFcrd_TLEPstore_tlsb_clr_1(r14,r8,r4,r13,_tlepreg)
269 and r13, 0xf, r25; /* isolate low 4 bits */ \
279 bic r13, 0xf, r13 /* clear low 4 bits of vector */
304 ldah r13,0xa0(r31)
305 sll r13,8,r13
[all...] |
| H A D | osfpal.S | 112 // r13 local scratch
226 mfpr r13, pt_entmm // get entry point
234 mtpr r13, exc_addr // load exc_addr with entMM
259 mfpr r13, ev5__intid // Fetch level of interruptor
268 cmple r13, r14, r8 // R8 = 1 if intid .less than or eql. ipl
292 subq r13, 0x11, r12 // Start to translate from EV5IPL->OSFIPL
295 subq r13, 0x1d, r9 // Check for 1d, 1e, 1f
498 srl r8, mm_stat_v_ra, r13 // Shift Ra field to ls bits
503 and r13, 0x1F, r8 // isolate ra
528 srl r13, mm_stat_v_opcod
[all...] |
| /gem5/ext/systemc/src/sysc/qt/md/ |
| H A D | iX86_64.s | 45 pushq %r13 /* 7 ... */
69 popq %r13 /* ... */
|
| H A D | powerpc_mach.s | 44 * r13-r14 non volatile registers
258 stmw r13,GPR_SAVE_13(r1) /* save non-volatile reg */
268 lmw r13,GPR_SAVE_13(r1) /* restore non-volatile reg */
314 lmw r13,GPR_SAVE_13(r1) /* restore non-volatile reg */
|
| H A D | powerpc_sys5.s | 37 * r13-r14 non volatile registers
256 stmw %r13,GPR_SAVE_13(%r1) /* save non-volatile reg */
266 lmw %r13,GPR_SAVE_13(%r1) /* restore non-volatile reg */
312 lmw %r13,GPR_SAVE_13(%r1) /* restore non-volatile reg */
|
| H A D | hppa.s | 60 stw %r13,-88(%sp)
81 ldw -88(%sp),%r13
|
| /gem5/src/arch/x86/ |
| H A D | nativetrace.cc | 60 r13 = X86ISA::gtoh(r13);
87 r13 = tc->readIntReg(X86ISA::INTREG_R13);
169 checkReg("r13", mState.r13, nState.r13);
|
| H A D | nativetrace.hh | 63 uint64_t r13; member in struct:Trace::X86NativeTrace::ThreadState
|
| H A D | remote_gdb.hh | 113 uint64_t r13; member in struct:X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED
|
| H A D | remote_gdb.cc | 124 r.r13 = context->readIntReg(INTREG_R13);
176 context->setIntReg(INTREG_R13, r.r13);
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| /gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/ |
| H A D | int_datatype.cpp | 75 unsigned int r10, r11, r12, r13, r14, r15, r16, r17, r18, r19; local
103 r13 = op1 += op2; // Compound addition
178 << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13
|
| /gem5/system/alpha/h/ |
| H A D | dc21164FromGasSources.h | 702 #define r13 $13 macro
807 #define p5 r13 /* Local Scratch */
|
| /gem5/util/statetrace/arch/amd64/ |
| H A D | tracechild.cc | 104 case R13: return myregs.r13;
|
| /gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/ |
| H A D | std_ulogic_datatype.cpp | 199 std_ulogic r10, r11, r12, r13, r14, r15, r16, r17, r18, r19; local
227 // r13 = op1 += op2; // Compound addition
302 // << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13
|
| /gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/ |
| H A D | std_ulogic_vector_datatype.cpp | 495 std_ulogic_vector<4> r9, r10, r11, r12, r13, r14; local
527 // r13 = op1 += op2; // Compound addition
617 // << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13
|
| /gem5/src/cpu/kvm/ |
| H A D | x86_cpu.cc | 119 APPLY_IREG(r13, INTREG_R13); \
|