| /gem5/src/arch/sparc/insts/ |
| H A D | blockmem.hh | 65 OpClass __opClass, int8_t _offset) :
66 SparcMicroInst(mnem, _machInst, __opClass), offset(_offset)
79 OpClass __opClass, int8_t _offset) :
80 BlockMemMicro(mnem, _machInst, __opClass, _offset),
64 BlockMemMicro(const char *mnem, ExtMachInst _machInst, OpClass __opClass, int8_t _offset) argument
78 BlockMemImmMicro(const char *mnem, ExtMachInst _machInst, OpClass __opClass, int8_t _offset) argument
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| /gem5/ext/systemc/src/sysc/qt/md/ |
| H A D | axp.c | 27 | iarg3 <-- va_list._a0 + va_list._offset
80 #define _offset __offset macro
84 #define _offset offset macro
104 tmove = 6 - ap._offset/sizeof(qt_word_t);
109 sp[i+6] = ((qt_word_t *)(ap._a0 + ap._offset))[i];
111 sp[i] = ((qt_word_t *)(ap._a0 + ap._offset))[i-6];
119 sp[i] = sp[i+6] = ((qt_word_t *)(ap._a0 + ap._offset))[i];
124 sp[i+6] = ((qt_word_t *)(ap._a0 + ap._offset))[i];
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| /gem5/src/base/ |
| H A D | pixel.cc | 67 PixelConverter::Channel::Channel(unsigned _offset, unsigned width) argument
68 : offset(_offset),
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| /gem5/src/arch/arm/insts/ |
| H A D | sve_mem.hh | 114 IntRegIndex _offset)
116 dest(_dest), gp(_gp), base(_base), offset(_offset),
112 SveContigMemSS(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset) argument
|
| H A D | sve_macromem.hh | 63 IntRegIndex _offset, uint8_t _numregs)
65 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs)
74 _gp, _base, _offset, _numregs, i);
134 IntRegIndex _offset, uint8_t _numregs)
136 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs)
151 _gp, _base, _offset, _numregs, i);
451 IntRegIndex _offset, bool _offsetIs32,
455 dest(_dest), gp(_gp), base(_base), offset(_offset),
484 mnem, machInst, _offset, this);
491 isLoad ? (IntRegIndex) VECREG_UREG0 : _offset, _offsetIs3
61 SveLdStructSS(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, uint8_t _numregs) argument
132 SveStStructSS(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, uint8_t _numregs) argument
449 SveIndexedMemSV(const char *mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, bool _offsetIs32, bool _offsetIsSigned, bool _offsetIsScaled, bool firstFault) argument
[all...] |
| H A D | mem64.hh | 213 IntRegIndex _offset, ArmExtendType _type,
216 offset(_offset), type(_type), shiftAmt(_shiftAmt)
211 MemoryReg64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, ArmExtendType _type, uint64_t _shiftAmt) argument
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| /gem5/src/dev/arm/ |
| H A D | generic_timer.cc | 100 _control(0), _counterLimit(0), _offset(0),
175 _offset = val;
182 return _systemCounter.value() - _offset;
190 SERIALIZE_SCALAR(_offset);
200 if (!UNSERIALIZE_OPT_SCALAR(_offset))
201 _offset = 0;
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| H A D | generic_timer.hh | 137 uint64_t _offset; member in class:ArchTimer
174 uint64_t offset() const { return _offset; }
|
| /gem5/src/dev/net/ |
| H A D | sinicreg.hh | 39 static const uint32_t NAME##_offset = OFFSET; \
49 static const uint64_t NAME##_offset = OFFSET; \
|
| /gem5/src/gpu-compute/ |
| H A D | hsail_code.hh | 231 StorageElement(const char *_name, uint64_t _offset, int _size, argument
233 : name(_name), offset(_offset), size(_size), brigSymbol(sym)
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| /gem5/src/systemc/tests/tlm/nb2b_adapter/ |
| H A D | nb2b_adapter.cpp | 186 Interconnect(sc_module_name _name, unsigned int _offset) argument
190 , offset(_offset)
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| /gem5/ext/libelf/ |
| H A D | libelf.h | 215 char *elf_strptr(Elf *_elf, size_t _section, size_t _offset);
|