Searched refs:MISCREG_TSG_BASE (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/x86/
H A Dfaults.cc255 tc->setMiscReg(MISCREG_TSG_BASE, 0);
H A Disa.cc289 case MISCREG_TSG_BASE:
H A Dsystem.cc195 tc->setMiscReg(MISCREG_TSG_BASE, GDTBase);
H A Dprocess.cc373 tc->setMiscReg(MISCREG_TSG_BASE, GDTVirtAddr);
446 tc->setMiscReg(MISCREG_TSG_BASE, GDTVirtAddr);
720 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
/gem5/src/arch/x86/regs/
H A Dmisc.hh322 MISCREG_TSG_BASE, enumerator in enum:X86ISA::MiscRegIndex

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