Searched refs:MISCREG_ICC_AP0R0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dmiscregs.hh800 MISCREG_ICC_AP0R0, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc740 case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15:
2077 case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15:
H A Dmiscregs.cc687 return MISCREG_ICC_AP0R0;
4525 .mapsTo(MISCREG_ICC_AP0R0);
4772 InitReg(MISCREG_ICC_AP0R0)
/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc145 case MISCREG_ICC_AP0R0:
767 case MISCREG_ICC_AP0R0:

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