Searched refs:INIT (Results 1 - 9 of 9) sorted by relevance
| /gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/ |
| H A D | test2.cpp | 54 int INIT)
58 init = INIT;
92 int INIT)
97 init = INIT;
50 p1(sc_module_name name, sc_fifo<int>& A, sc_fifo<int>& B, sc_signal_in_if<bool>& CLK, int INIT) argument
88 p2(sc_module_name name, sc_clock& CLK, sc_fifo<int>& A, sc_fifo<int>& B, int INIT) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/ |
| H A D | test3.cpp | 50 int INIT)
53 init = INIT;
83 int INIT)
88 init = INIT;
48 p1(sc_module_name name, sc_fifo<int>& B, int INIT) argument
80 p2(sc_module_name name, sc_signal_in_if<bool>& CLK, sc_fifo<int>& A, int INIT) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/ |
| H A D | test1.cpp | 54 int INIT)
57 init = INIT;
50 p1(sc_module_name name, sc_fifo<int>& A, sc_fifo<int>& B, sc_signal<bool>& CLOCK, int INIT) argument
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| /gem5/ext/sst/ |
| H A D | ExtMaster.hh | 75 enum Phase { CONSTRUCTION, INIT, RUN }; enumerator in enum:SST::gem5::ExtMaster::Phase
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| H A D | ExtSlave.hh | 86 enum Phase { CONSTRUCTION, INIT, RUN }; enumerator in enum:SST::gem5::ExtSlave::Phase
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| H A D | ExtSlave.cc | 69 simPhase = INIT;
129 if (simPhase == INIT) {
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| H A D | ExtMaster.cc | 82 simPhase = INIT;
190 if (simPhase == INIT) {
191 out.fatal(CALL_INFO, 1, "not prepared to handle INIT-phase traffic\n");
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| /gem5/src/arch/x86/ |
| H A D | intmessage.hh | 59 INIT = 5, enumerator in enum:X86ISA::DeliveryMode::IntDeliveryMode
67 "NMI", "INIT", "Startup", "ExtInt"
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| H A D | interrupts.cc | 231 * The SMI, NMI, ExtInt, INIT, etc interrupts go straight through.
260 } else if (deliveryMode == DeliveryMode::INIT && !pendingInit) {
664 DPRINTF(LocalApic, "Generated INIT fault object.\n");
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