Searched refs:vector (Results 551 - 575 of 763) sorted by relevance

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/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.cc52 // The KVM interface accesses vector registers of 4 single precision
55 static_assert(NUM_QREGS == 32, "Unexpected number of aarch64 vector regs.");
100 const std::vector<ArmV8KvmCPU::IntRegInfo> ArmV8KvmCPU::intRegMap = {
105 const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegMap = {
122 const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegIdMap = {
358 const std::vector<ArmV8KvmCPU::MiscRegInfo> &
/gem5/src/arch/sparc/
H A Dprocess.hh37 #include <vector>
/gem5/src/cpu/o3/
H A Dcomm.hh48 #include <vector>
H A Drob.hh49 #include <vector>
/gem5/src/dev/net/
H A Detherswitch.hh188 std::vector<Interface*> interfaces;
/gem5/src/mem/cache/prefetch/
H A Dsbooe.cc125 std::vector<AddrPriority> &addresses)
H A Dbase.hh84 std::vector<PrefetchListener *> listeners;
H A Dqueued.hh187 std::vector<AddrPriority> &addresses) = 0;
/gem5/src/kern/linux/
H A Dhelpers.cc124 std::vector<uint8_t> log_buf(log_buf_len);
/gem5/src/mem/cache/
H A Dqueue.hh96 std::vector<Entry> entries;
/gem5/src/mem/cache/tags/
H A Dbase.hh286 std::vector<CacheBlk*>& evict_blks) const = 0;
/gem5/src/arch/generic/
H A Dvec_reg.hh49 * The design is having a basic vector register container that holds the
51 * As the (maximum) length of the physical vector register is a compile-time
58 * elements that the vector contains (NumElems). The size of a view,
61 * has vector semantics, and defines the index operator ([]) to get
65 * A VecLaneT is a view of a lane of a vector register, where a lane is
79 * // We implement the physical vector register file
84 * // Request source vector register to the execution context (const as it
87 * // View it as a vector of floats (we could just specify the first
109 * // Request source vector register to the execution context (const as it
112 * // View it as a lane of a vector o
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/gem5/src/base/
H A Dstatistics.cc178 vector<string> vec;
180 vector<string>::const_iterator item = vec.begin();
236 vector<string> v1;
237 vector<string> v2;
/gem5/src/cpu/minor/
H A Dexec_context.hh116 const std::vector<bool>& byteEnable = std::vector<bool>())
126 const std::vector<bool>& byteEnable = std::vector<bool>())
235 /** Reads source vector 8bit operand. */
245 /** Reads source vector 16bit operand. */
255 /** Reads source vector 32bit operand. */
265 /** Reads source vector 64bit operand. */
275 /** Write a lane of the destination vector operand. */
/gem5/ext/googletest/googletest/include/gtest/
H A Dgtest.h56 #include <vector>
573 // Gets the vector of TestPartResults.
574 const std::vector<TestPartResult>& test_part_results() const {
578 // Gets the vector of TestProperties.
579 const std::vector<TestProperty>& test_properties() const {
616 // Protects mutable state of the property vector and of owned
620 // The vector of TestPartResults
621 std::vector<TestPartResult> test_part_results_;
622 // The vector of TestProperties
623 std::vector<TestPropert
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/gem5/ext/googletest/googletest/test/
H A Dgtest-param-test_test.cc45 # include <vector>
54 using ::std::vector;
361 // container (vector).
363 typedef ::std::vector<int> ContainerType;
376 typedef ::std::vector<int> ContainerType;
390 typedef ::std::vector<int> ContainerType;
402 typedef ::std::vector<int> ContainerType;
668 vector<int> expected_values(test_generation_params,
681 static vector<int> collected_parameters_;
686 vector<in
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/gem5/ext/mcpat/
H A Dbasic_components.h36 #include <vector>
223 vector<McPATComponent*> children;
/gem5/src/gpu-compute/
H A Dkernel_cfg.cc51 const std::vector<GPUStaticInst*>& instructions)
58 ControlFlowInfo::ControlFlowInfo(const std::vector<GPUStaticInst*>& insts) :
/gem5/src/mem/ruby/common/
H A DNetDest.cc105 std::vector<NodeID>
108 std::vector<NodeID> dest;
/gem5/ext/systemc/src/sysc/kernel/
H A Dsc_reset.cpp138 std::vector<sc_reset_target>::size_type process_i; // index of process resetting.
139 std::vector<sc_reset_target>::size_type process_n; // # of processes to reset.
/gem5/ext/systemc/src/sysc/utils/
H A Dsc_vector.h22 sc_vector.h - A vector of named (SystemC) objects (modules, ports, channels)
32 #include <vector>
91 typedef std::vector< void* > storage_type;
97 std::vector<sc_object*> const & get_elements() const;
157 mutable std::vector< sc_object* >* objs_vec_;
261 // underlying vector iterator
480 const std::vector< sc_object* > & get_elements() const;
575 mutable std::vector< sc_object* >* child_vec_;
674 std::vector< sc_object* > const &
678 child_vec_ = new std::vector< sc_objec
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/gem5/ext/systemc/src/tlm_utils/
H A Dpeq_with_cb_and_phase.h31 #include <vector>
189 std::vector<PAYLOAD> entries;
/gem5/src/dev/arm/
H A Dpl111.hh172 * vector and calls dmaDone() when triggered.
350 std::vector<DmaDoneEvent> dmaDoneEventAll;
353 std::vector<DmaDoneEvent *> dmaDoneEventFree;
/gem5/ext/drampower/src/
H A DCommandAnalysis.cc170 void CommandAnalysis::getCommands(std::vector<MemCommand>& list, bool lastupdate, int64_t timestamp)
214 void CommandAnalysis::evaluateCommands(vector<MemCommand>& cmd_list)
/gem5/src/sim/
H A Deventq.cc39 #include <vector>
59 vector<EventQueue *> mainEventQueue;

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