Searched refs:vector (Results 476 - 500 of 763) sorted by relevance

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/gem5/src/gpu-compute/
H A Dgpu_dyn_inst.hh222 std::vector<Addr> addr;
457 typedef std::unordered_map<Addr, std::vector<int>> StatusVector;
463 std::vector<int> statusVector;
464 std::vector<int> tlbHitLevel;
H A Ddispatcher.hh42 #include <vector>
H A Dlds_state.hh45 #include <vector>
98 std::vector<uint8_t>::size_type
106 std::vector<uint8_t> chunk;
/gem5/src/mem/
H A Dbridge.hh176 int _resp_limit, std::vector<AddrRange> _ranges);
H A Dserial_link.hh168 std::vector<AddrRange>& _ranges);
H A Dpage_table.hh159 void getMappings(std::vector<std::pair<Addr, Addr>> *addr_mappings);
H A Dmem_checker.hh48 #include <vector>
294 * vector will contain the full set.
296 * @return Reference to internally maintained vector maintaining last
299 const std::vector<uint8_t>& lastExpectedData() const
370 std::vector<uint8_t> _lastExpectedData;
/gem5/src/mem/cache/prefetch/
H A Dsignature_path_v2.cc58 std::vector<GlobalHistoryEntry *> all_ghr_entries =
/gem5/src/sim/
H A Dclocked_object.hh262 std::vector<double> pwrStateWeights() const;
H A Dinit.cc54 #include <vector>
273 std::vector<WArgUPtr> v_argv;
274 std::vector<wchar_t *> vp_argv;
/gem5/src/mem/ruby/profiler/
H A DAddressProfiler.cc31 #include <vector>
72 std::vector<const AccessTraceForAddress *> sorted;
99 std::vector<int64_t> m_touched_vec;
100 std::vector<int64_t> m_touched_weighted_vec;
/gem5/src/learning_gem5/part2/
H A Dsimple_cache.hh59 /// Since this is a vector port, need to know what number this one is
275 std::vector<CPUSidePort> cpuPorts;
/gem5/src/arch/x86/bios/
H A Dintelmp.hh44 #include <vector>
160 std::vector<BaseConfigEntry *> baseEntries;
161 std::vector<ExtConfigEntry *> extEntries;
/gem5/src/dev/net/
H A Dtcp_iface.cc56 #include <vector>
77 std::vector<std::pair<TCPIface::NodeInfo, int> > TCPIface::nodes;
78 vector<int> TCPIface::sockRegistry;
/gem5/src/base/
H A Dinifile.cc38 #include <vector>
256 vector<string> unref_ok_entries;
296 IniFile::getSectionNames(vector<string> &list) const
/gem5/ext/sst/
H A Dgem5.cc96 std::vector<char*> args;
106 std::vector<char*> flags;
190 std::vector<char *> &args)
/gem5/src/systemc/core/
H A Dobject.cc184 const std::vector<sc_core::sc_object *> &
190 const std::vector<sc_core::sc_event *> &
291 const std::vector<sc_core::sc_object *> &
H A Dsensitivity.hh34 #include <vector>
110 typedef std::vector<DynamicSensitivity *> DynamicSensitivities;
125 typedef std::vector<StaticSensitivity *> StaticSensitivities;
/gem5/ext/googletest/googletest/test/
H A Dgtest-typed-test_test.cc35 #include <vector>
61 // We used to use std::list here, but switched to std::vector since
63 typedef std::vector<T> Vector;
320 typedef Types<std::vector<double>, std::set<char> > MyContainers;
/gem5/src/arch/arm/
H A Dpmu.hh46 #include <vector>
380 std::vector<std::unique_ptr<RegularProbe>> attachedProbePointList;
603 std::vector<CounterState> counters;
/gem5/src/arch/arm/tracers/
H A Dtarmac_record.cc282 TarmacTracerRecord::addInstEntry(std::vector<InstPtr>& queue,
293 TarmacTracerRecord::addMemEntry(std::vector<MemPtr>& queue,
309 TarmacTracerRecord::addRegEntry(std::vector<RegPtr>& queue,
/gem5/src/arch/x86/
H A Ddecoder.hh36 #include <vector>
75 std::vector<MachInst> chunks;
76 std::vector<MachInst> masks;
/gem5/src/cpu/o3/
H A Dinst_queue.hh50 #include <vector>
348 typedef std::priority_queue<DynInstPtr, std::vector<DynInstPtr>, pqCompare>
451 std::vector<bool> regScoreboard;
/gem5/src/systemc/ext/core/
H A Dsc_port.hh34 #include <vector>
67 typedef std::vector<sc_trace_params *> sc_trace_params_vec;
217 std::vector<IF *> _interfaces;
/gem5/src/arch/mips/
H A Dprocess.cc99 std::vector<AuxVector<IntType>> auxv;
137 for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
141 for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
179 // Copy the aux vector
186 // Write out the terminating zeroed auxilliary vector

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