Searched refs:std (Results 901 - 925 of 1914) sorted by relevance
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/gem5/src/sim/ |
H A D | dvfs_handler.hh | 181 typedef std::map<DomainID, SrcClockDomain*> Domains; 187 std::vector<DomainID> domainIDList; 256 typedef std::map<DomainID, UpdateEvent> UpdatePerfLevelEvents;
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/gem5/ext/systemc/src/sysc/kernel/ |
H A D | sc_reset.h | 60 inline std::ostream& operator << ( std::ostream& os, 108 std::vector<sc_reset_target> m_targets; // List of processes to reset.
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/gem5/src/systemc/tests/systemc/compliance_1666/test203a/ |
H A D | test203a.cpp | 7 using std::cout;
8 using std::endl;
19 std::vector<sc_object*> children = h.get_child_objects();
61 std::vector<sc_object*> children = this->get_child_objects();
74 std::vector<sc_object*> children2 = h2.get_child_objects();
90 std::vector<sc_object*> children3 = h3.get_child_objects();
120 std::vector<sc_object*> children3 = h3.get_child_objects();
144 std::vector<sc_object*> children3 = h3.get_child_objects();
168 std::vector<sc_object*> children3 = h3.get_child_objects();
190 std [all...] |
/gem5/src/arch/arm/insts/ |
H A D | branch.hh | 61 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 90 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 120 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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H A D | mem.cc | 47 using namespace std; 53 MemoryReg::printOffset(std::ostream &os) const 164 Memory::printInst(std::ostream &os, AddrMode addrMode) const
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/gem5/src/gpu-compute/ |
H A D | vector_register_file.hh | 102 std::vector<uint32_t> ®Vec, uint32_t operandSize, 135 std::vector<uint8_t> busy; 138 std::vector<uint8_t> nxtBusy;
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/gem5/ext/googletest/googlemock/src/ |
H A D | gmock-matchers.cc | 209 ::std::vector<char> seen; 259 bool TryAugment(size_t ilhs, ::std::vector<char>* seen) { 299 ::std::vector<size_t> left_; 300 ::std::vector<size_t> right_; 313 ::std::ostream* stream) { 315 ::std::ostream& os = *stream; 383 ::std::stringstream ss; 396 ::std::ostream* os) const { 417 ::std::ostream* os) const { 445 const ::std [all...] |
/gem5/src/dev/net/ |
H A D | ethertap.hh | 103 Port &getPort(const std::string &if_name, 110 std::queue<EthPacketPtr> packetBuffer; 120 EtherTapInt(const std::string &name, EtherTapBase *t) :
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/gem5/src/mem/ |
H A D | mem_delay.hh | 73 Port &getPort(const std::string &if_name, 79 MasterPort(const std::string &_name, MemDelay &_parent); 105 SlavePort(const std::string &_name, MemDelay &_parent);
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/gem5/src/systemc/ |
H A D | sc_port_wrapper.hh | 59 ScPortWrapper(ScPort& p, const std::string& name, PortID id) 99 ScInterfaceWrapper(IF& i, const std::string name, PortID id) 140 ScExportWrapper(ScExport& p, const std::string& name, PortID id)
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/gem5/src/base/ |
H A D | sat_counter.hh | 128 std::swap(initialVal, other.initialVal); 129 std::swap(maxVal, other.maxVal); 130 std::swap(counter, other.counter);
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/gem5/src/dev/x86/ |
H A D | intdev.hh | 64 IntSlavePort(const std::string& _name, SimObject* _parent, 87 typedef std::list<int> ApicList; 99 IntMasterPort(const std::string& _name, SimObject* _parent,
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/gem5/src/cpu/pred/ |
H A D | ras.hh | 90 std::vector<TheISA::PCState> addrStack;
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/gem5/src/unittest/ |
H A D | cprintftime.cc | 38 using namespace std;
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H A D | strnumtest.cc | 37 using namespace std;
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/gem5/ext/drampower/src/ |
H A D | MemorySpecification.cc | 40 using namespace std;
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/gem5/ext/dsent/model/optical_graph/ |
H A D | OpticalWavelength.cc | 35 using std::list; 36 using std::min; 124 std::pow(10.0, (current_path.losses[j] + IR_dB) / 10.0) * 131 number_detectors_ = std::min(number_detectors_, (unsigned int) current_path.detectors.size());
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/gem5/ext/dsent/model/timing_graph/ |
H A D | ElectricalDriverMultiplier.cc | 66 max_cap = std::max(max_cap, downstream_nodes->at(i)->getTotalDownstreamCap());
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/gem5/ext/mcpat/cacti/ |
H A D | component.h | 41 using namespace std;
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/gem5/src/arch/x86/bios/ |
H A D | e820.hh | 71 std::vector<E820Entry *> entries;
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/gem5/src/mem/ruby/common/ |
H A D | Address.hh | 49 std::string printAddress(Addr addr);
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/gem5/src/mem/ruby/structures/ |
H A D | BankedArray.hh | 61 std::vector<AccessRecord> busyBanks;
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/gem5/ext/nomali/lib/ |
H A D | jobcontrol.hh | 90 std::vector<JobSlot> slots;
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H A D | mmu.hh | 60 std::vector<AddrSpace> spaces;
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/gem5/src/mem/ruby/network/ |
H A D | BasicLink.cc | 45 BasicLink::print(std::ostream& out) const
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