Searched refs:pc (Results 101 - 125 of 272) sorted by relevance

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/gem5/src/arch/power/insts/
H A Dstatic_inst.cc59 PowerStaticInst::generateDisassembly(Addr pc, argument
H A Dinteger.hh95 Addr pc, const SymbolTable *symtab) const override;
118 Addr pc, const SymbolTable *symtab) const override;
139 Addr pc, const SymbolTable *symtab) const override;
175 Addr pc, const SymbolTable *symtab) const override;
/gem5/util/m5/
H A Dm5op_arm.S64 mov pc,lr
/gem5/src/arch/sparc/insts/
H A Dnop.hh65 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
H A Dblockmem.cc38 BlockMemMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
63 BlockMemImmMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
H A Dmem.cc39 Mem::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
66 MemImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
H A Dnop.cc59 std::string generateDisassembly(Addr pc,
65 std::string Nop::generateDisassembly(Addr pc, argument
/gem5/src/arch/alpha/
H A Dremote_gdb.hh62 uint64_t pc; member in struct:AlphaISA::RemoteGDB::AlphaGdbRegCache::__anon1
H A Dutility.hh108 advancePC(PCState &pc, const StaticInstPtr &inst) argument
110 pc.advance();
/gem5/src/mem/cache/prefetch/
H A Ddelta_correlating_prediction_tables.cc135 Addr pc = pfi.getPC(); local
137 // index using the pc
138 DCPTEntry *entry = table.findEntry(pc, false /* unused */);
144 entry = table.findVictim(pc);
146 table.insertEntry(pc, false /* unused */, entry);
H A Dpif.hh153 * @param pc PC of the instruction being retired
155 void notifyRetiredInst(const Addr pc);
167 void notify(const Addr& pc) override;
H A Dspatio_temporal_memory_streaming.cc84 patternSequenceTable.findEntry(agt_entry.pc,
88 pst_entry = patternSequenceTable.findVictim(agt_entry.pc);
90 patternSequenceTable.insertEntry(agt_entry.pc,
126 Addr pc = pfi.getPC(); local
150 Addr pst_addr = (pc << spatialRegionSizeBits) + sr_offset;
159 agt_entry->pc = pc;
/gem5/src/arch/arm/insts/
H A Dsve_mem.hh71 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
96 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
122 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
148 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
H A Dmisc64.hh57 Addr pc, const SymbolTable *symtab) const override;
76 Addr pc, const SymbolTable *symtab) const override;
95 Addr pc, const SymbolTable *symtab) const override;
107 Addr pc, const SymbolTable *symtab) const override;
167 Addr pc, const SymbolTable *symtab) const override;
185 Addr pc, const SymbolTable *symtab) const override;
203 Addr pc, const SymbolTable *symtab) const override;
231 Addr pc, const SymbolTable *symtab) const override;
H A Dmem64.hh62 Addr pc, const SymbolTable *symtab) const override;
143 Addr pc, const SymbolTable *symtab) const override;
159 Addr pc, const SymbolTable *symtab) const override;
175 Addr pc, const SymbolTable *symtab) const override;
188 Addr pc, const SymbolTable *symtab) const override;
201 Addr pc, const SymbolTable *symtab) const override;
220 Addr pc, const SymbolTable *symtab) const override;
232 Addr pc, const SymbolTable *symtab) const override;
247 Addr pc, const SymbolTable *symtab) const override;
261 Addr pc, cons
[all...]
/gem5/src/cpu/minor/
H A Dfetch2.cc191 TheISA::PCState inst_pc = inst->pc;
332 (line_in->pc.instAddr() & BaseCPU::PCMask) -
336 line_in->pc, fetch_info.inputIndex, line_in->lineBaseAddr,
338 fetch_info.pc = line_in->pc;
368 dyn_inst->pc = fetch_info.pc;
387 decoder->moreBytes(fetch_info.pc,
412 StaticInstPtr decoded_inst = decoder->decode(fetch_info.pc);
415 dyn_inst->pc
[all...]
H A Dfetch2.hh105 pc(TheISA::PCState(0)),
116 pc(other.pc),
135 TheISA::PCState pc; member in struct:Minor::Fetch2::Fetch2ThreadInfo
/gem5/src/arch/riscv/
H A Dremote_gdb.hh66 uint64_t pc; member in struct:RiscvISA::RemoteGDB::RiscvGdbRegCache::__anon1
/gem5/ext/ply/example/BASIC/
H A Dbasinterp.py52 for pc in range(len(self.stat)):
53 lineno = self.stat[pc]
57 for i in range(pc+1,len(self.stat)):
61 self.loopend[pc] = i
64 print("FOR WITHOUT NEXT AT LINE %s" % self.stat[pc])
86 print("UNDEFINED VARIABLE %s AT LINE %s" % (var, self.stat[self.pc]))
98 print("LIST INDEX OUT OF BOUNDS AT LINE %s" % self.stat[self.pc])
106 print("TABLE INDEX OUT OUT BOUNDS AT LINE %s" % self.stat[self.pc])
109 print("UNDEFINED VARIABLE %s AT LINE %s" % (var, self.stat[self.pc]))
153 print ("DIMENSION TOO LARGE AT LINE %s" % self.stat[self.pc])
[all...]
/gem5/src/cpu/
H A Dnativetrace.hh82 const StaticInstPtr staticInst, TheISA::PCState pc,
86 staticInst, pc, macroStaticInst);
81 getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, TheISA::PCState pc, const StaticInstPtr macroStaticInst = NULL) argument
H A Dbase_dyn_inst_impl.hh76 pc = _pc;
188 cprintf("T%d : %#08d `", threadNumber, pc.instAddr());
189 std::cout << staticInst->disassemble(pc.instAddr());
198 s << "T" << threadNumber << " : 0x" << pc.instAddr() << " "
199 << staticInst->disassemble(pc.instAddr());
/gem5/src/arch/x86/
H A Dutility.hh90 advancePC(PCState &pc, const StaticInstPtr &inst) argument
92 inst->advancePC(pc);
/gem5/src/arch/sparc/
H A Dremote_gdb.hh62 uint32_t pc; member in struct:SparcISA::RemoteGDB::SPARCGdbRegCache::__anon7
86 uint64_t pc; member in struct:SparcISA::RemoteGDB::SPARC64GdbRegCache::__anon8
/gem5/src/arch/riscv/insts/
H A Dstatic_inst.hh55 void advancePC(PCState &pc) const override { pc.advance(); }
/gem5/src/cpu/pred/
H A Dtage_sc_l_8KB.hh59 uint16_t gtag(ThreadID tid, Addr pc, int bank) const override;
105 void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo* bi,

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