14120Sgblack@eecs.umich.edu/*
24120Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company
34120Sgblack@eecs.umich.edu * All rights reserved.
44120Sgblack@eecs.umich.edu *
57087Snate@binkert.org * The license below extends only to copyright in the software and shall
67087Snate@binkert.org * not be construed as granting a license to any other intellectual
77087Snate@binkert.org * property including but not limited to intellectual property relating
87087Snate@binkert.org * to a hardware implementation of the functionality of the software
97087Snate@binkert.org * licensed hereunder.  You may use the software subject to the license
107087Snate@binkert.org * terms below provided that you ensure that this notice is replicated
117087Snate@binkert.org * unmodified and in its entirety in all distributions of the software,
127087Snate@binkert.org * modified or unmodified, in source code or in binary form.
134120Sgblack@eecs.umich.edu *
147087Snate@binkert.org * Redistribution and use in source and binary forms, with or without
157087Snate@binkert.org * modification, are permitted provided that the following conditions are
167087Snate@binkert.org * met: redistributions of source code must retain the above copyright
177087Snate@binkert.org * notice, this list of conditions and the following disclaimer;
187087Snate@binkert.org * redistributions in binary form must reproduce the above copyright
197087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the
207087Snate@binkert.org * documentation and/or other materials provided with the distribution;
217087Snate@binkert.org * neither the name of the copyright holders nor the names of its
224120Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
237087Snate@binkert.org * this software without specific prior written permission.
244120Sgblack@eecs.umich.edu *
254120Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
264120Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
274120Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
284120Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
294120Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
304120Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
314120Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
324120Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
334120Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
344120Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
354120Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
364120Sgblack@eecs.umich.edu *
374120Sgblack@eecs.umich.edu * Authors: Gabe Black
384120Sgblack@eecs.umich.edu */
394120Sgblack@eecs.umich.edu
404120Sgblack@eecs.umich.edu#ifndef __ARCH_X86_UTILITY_HH__
414120Sgblack@eecs.umich.edu#define __ARCH_X86_UTILITY_HH__
424120Sgblack@eecs.umich.edu
437720Sgblack@eecs.umich.edu#include "cpu/static_inst.hh"
444241Sgblack@eecs.umich.edu#include "cpu/thread_context.hh"
458768Sgblack@eecs.umich.edu#include "sim/full_system.hh"
464148Sgblack@eecs.umich.edu
474120Sgblack@eecs.umich.edunamespace X86ISA
484120Sgblack@eecs.umich.edu{
497720Sgblack@eecs.umich.edu
507720Sgblack@eecs.umich.edu    inline PCState
517720Sgblack@eecs.umich.edu    buildRetPC(const PCState &curPC, const PCState &callPC)
527720Sgblack@eecs.umich.edu    {
537720Sgblack@eecs.umich.edu        PCState retPC = callPC;
547720Sgblack@eecs.umich.edu        retPC.uEnd();
557720Sgblack@eecs.umich.edu        return retPC;
567720Sgblack@eecs.umich.edu    }
577720Sgblack@eecs.umich.edu
587707Sgblack@eecs.umich.edu    uint64_t
597707Sgblack@eecs.umich.edu    getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
605086Sgblack@eecs.umich.edu
614148Sgblack@eecs.umich.edu    static inline bool
624148Sgblack@eecs.umich.edu    inUserMode(ThreadContext *tc)
634148Sgblack@eecs.umich.edu    {
648768Sgblack@eecs.umich.edu        if (!FullSystem) {
658768Sgblack@eecs.umich.edu            return true;
668768Sgblack@eecs.umich.edu        } else {
678768Sgblack@eecs.umich.edu            HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
688768Sgblack@eecs.umich.edu            return m5reg.cpl == 3;
698768Sgblack@eecs.umich.edu        }
704148Sgblack@eecs.umich.edu    }
714148Sgblack@eecs.umich.edu
724148Sgblack@eecs.umich.edu    /**
734148Sgblack@eecs.umich.edu     * Function to insure ISA semantics about 0 registers.
744148Sgblack@eecs.umich.edu     * @param tc The thread context.
754148Sgblack@eecs.umich.edu     */
764148Sgblack@eecs.umich.edu    template <class TC>
774148Sgblack@eecs.umich.edu    void zeroRegisters(TC *tc);
784148Sgblack@eecs.umich.edu
795135Sgblack@eecs.umich.edu    void initCPU(ThreadContext *tc, int cpuId);
805135Sgblack@eecs.umich.edu
815135Sgblack@eecs.umich.edu    void startupCPU(ThreadContext *tc, int cpuId);
826329Sgblack@eecs.umich.edu
836329Sgblack@eecs.umich.edu    void copyRegs(ThreadContext *src, ThreadContext *dest);
846329Sgblack@eecs.umich.edu
856329Sgblack@eecs.umich.edu    void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
867693SAli.Saidi@ARM.com
877693SAli.Saidi@ARM.com    void skipFunction(ThreadContext *tc);
887720Sgblack@eecs.umich.edu
897720Sgblack@eecs.umich.edu    inline void
9010417Sandreas.hansson@arm.com    advancePC(PCState &pc, const StaticInstPtr &inst)
917720Sgblack@eecs.umich.edu    {
927720Sgblack@eecs.umich.edu        inst->advancePC(pc);
937720Sgblack@eecs.umich.edu    }
948300Schander.sudanthi@arm.com
958300Schander.sudanthi@arm.com    inline uint64_t
968300Schander.sudanthi@arm.com    getExecutingAsid(ThreadContext *tc)
978300Schander.sudanthi@arm.com    {
988300Schander.sudanthi@arm.com        return 0;
998300Schander.sudanthi@arm.com    }
1008300Schander.sudanthi@arm.com
1019759Sandreas@sandberg.pp.se
1029759Sandreas@sandberg.pp.se    /**
1039759Sandreas@sandberg.pp.se     * Reconstruct the rflags register from the internal gem5 register
1049759Sandreas@sandberg.pp.se     * state.
1059759Sandreas@sandberg.pp.se     *
1069759Sandreas@sandberg.pp.se     * gem5 stores rflags in several different registers to avoid
1079759Sandreas@sandberg.pp.se     * pipeline dependencies. In order to get the true rflags value,
1089759Sandreas@sandberg.pp.se     * we can't simply read the value of MISCREG_RFLAGS. Instead, we
1099759Sandreas@sandberg.pp.se     * need to read out various state from microcode registers and
1109759Sandreas@sandberg.pp.se     * merge that with MISCREG_RFLAGS.
1119759Sandreas@sandberg.pp.se     *
1129759Sandreas@sandberg.pp.se     * @param tc Thread context to read rflags from.
1139759Sandreas@sandberg.pp.se     * @return rflags as seen by the guest.
1149759Sandreas@sandberg.pp.se     */
1159759Sandreas@sandberg.pp.se    uint64_t getRFlags(ThreadContext *tc);
1169759Sandreas@sandberg.pp.se
1179759Sandreas@sandberg.pp.se    /**
1189759Sandreas@sandberg.pp.se     * Set update the rflags register and internal gem5 state.
1199759Sandreas@sandberg.pp.se     *
1209759Sandreas@sandberg.pp.se     * @note This function does not update MISCREG_M5_REG. You might
1219759Sandreas@sandberg.pp.se     * need to update this register by writing anything to
1229759Sandreas@sandberg.pp.se     * MISCREG_M5_REG with side-effects.
1239759Sandreas@sandberg.pp.se     *
1249759Sandreas@sandberg.pp.se     * @see X86ISA::getRFlags()
1259759Sandreas@sandberg.pp.se     *
1269759Sandreas@sandberg.pp.se     * @param tc Thread context to update
1279759Sandreas@sandberg.pp.se     * @param val New rflags value to store in TC
1289759Sandreas@sandberg.pp.se     */
1299759Sandreas@sandberg.pp.se    void setRFlags(ThreadContext *tc, uint64_t val);
1309764Sandreas@sandberg.pp.se
1319764Sandreas@sandberg.pp.se    /**
1329764Sandreas@sandberg.pp.se     * Extract the bit string representing a double value.
1339764Sandreas@sandberg.pp.se     */
1349764Sandreas@sandberg.pp.se    inline uint64_t getDoubleBits(double val) {
1359764Sandreas@sandberg.pp.se        return *(uint64_t *)(&val);
1369764Sandreas@sandberg.pp.se    }
1379765Sandreas@sandberg.pp.se
1389765Sandreas@sandberg.pp.se    /**
1399880Sandreas@sandberg.pp.se     * Convert an x87 tag word to abridged tag format.
1409880Sandreas@sandberg.pp.se     *
1419880Sandreas@sandberg.pp.se     * Convert from the x87 tag representation to the tag abridged
1429880Sandreas@sandberg.pp.se     * representation used in the FXSAVE area. The classic format uses
1439880Sandreas@sandberg.pp.se     * 2 bits per stack position to indicate if a position is valid,
1449880Sandreas@sandberg.pp.se     * zero, special, or empty. The abridged format only stores
1459880Sandreas@sandberg.pp.se     * whether a position is empty or not.
1469880Sandreas@sandberg.pp.se     *
1479880Sandreas@sandberg.pp.se     * @param ftw Tag word in classic x87 format.
1489880Sandreas@sandberg.pp.se     * @return Tag word in the abridged format.
1499880Sandreas@sandberg.pp.se     */
1509880Sandreas@sandberg.pp.se    uint8_t convX87TagsToXTags(uint16_t ftw);
1519880Sandreas@sandberg.pp.se
1529880Sandreas@sandberg.pp.se    /**
1539880Sandreas@sandberg.pp.se     * Convert an x87 xtag word to normal tags format.
1549880Sandreas@sandberg.pp.se     *
1559880Sandreas@sandberg.pp.se     * Convert from the abridged x87 tag representation used in the
1569880Sandreas@sandberg.pp.se     * FXSAVE area to a full x87 tag. The classic format uses 2 bits
1579880Sandreas@sandberg.pp.se     * per stack position to indicate if a position is valid, zero,
1589880Sandreas@sandberg.pp.se     * special, or empty. The abridged format only stores whether a
1599880Sandreas@sandberg.pp.se     * position is empty or not.
1609880Sandreas@sandberg.pp.se     *
1619880Sandreas@sandberg.pp.se     * @todo Reconstruct the correct state of stack positions instead
1629880Sandreas@sandberg.pp.se     * of just valid/invalid.
1639880Sandreas@sandberg.pp.se     *
1649880Sandreas@sandberg.pp.se     * @param ftwx Tag word in the abridged format.
1659880Sandreas@sandberg.pp.se     * @return Tag word in classic x87 format.
1669880Sandreas@sandberg.pp.se     */
1679880Sandreas@sandberg.pp.se    uint16_t convX87XTagsToTags(uint8_t ftwx);
1689880Sandreas@sandberg.pp.se
1699880Sandreas@sandberg.pp.se    /**
1709765Sandreas@sandberg.pp.se     * Generate and updated x87 tag register after a push/pop
1719765Sandreas@sandberg.pp.se     * operation.
1729765Sandreas@sandberg.pp.se     *
1739765Sandreas@sandberg.pp.se     * @note There is currently no support for setting other tags than
1749765Sandreas@sandberg.pp.se     * valid and invalid. A real x87 will set the tag value to zero or
1759765Sandreas@sandberg.pp.se     * special for some special floating point values.
1769765Sandreas@sandberg.pp.se     *
1779765Sandreas@sandberg.pp.se     * @param ftw Current value of the FTW register.
1789765Sandreas@sandberg.pp.se     * @param top Current x87 TOP value.
1799765Sandreas@sandberg.pp.se     * @param spm Stack displacement.
1809765Sandreas@sandberg.pp.se     * @return New value of the FTW register.
1819765Sandreas@sandberg.pp.se     */
1829765Sandreas@sandberg.pp.se    uint16_t genX87Tags(uint16_t ftw, uint8_t top, int8_t spm);
1839889Sandreas@sandberg.pp.se
1849889Sandreas@sandberg.pp.se    /**
1859889Sandreas@sandberg.pp.se     * Load an 80-bit float from memory and convert it to double.
1869889Sandreas@sandberg.pp.se     *
1879889Sandreas@sandberg.pp.se     * @param mem Pointer to an 80-bit float.
1889889Sandreas@sandberg.pp.se     * @return double representation of the 80-bit float.
1899889Sandreas@sandberg.pp.se     */
1909889Sandreas@sandberg.pp.se    double loadFloat80(const void *mem);
1919889Sandreas@sandberg.pp.se
1929889Sandreas@sandberg.pp.se    /**
1939889Sandreas@sandberg.pp.se     * Convert and store a double as an 80-bit float.
1949889Sandreas@sandberg.pp.se     *
1959889Sandreas@sandberg.pp.se     * @param mem Pointer to destination for the 80-bit float.
1969889Sandreas@sandberg.pp.se     * @param value Double precision float to store.
1979889Sandreas@sandberg.pp.se     */
1989889Sandreas@sandberg.pp.se    void storeFloat80(void *mem, double value);
1998902Sandreas.hansson@arm.com}
2004120Sgblack@eecs.umich.edu
2014120Sgblack@eecs.umich.edu#endif // __ARCH_X86_UTILITY_HH__
202