Searched refs:memory (Results 76 - 100 of 107) sorted by relevance
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/gem5/src/mem/ |
H A D | mem_checker_monitor.cc | 44 #include <memory> 161 // If a cache miss is served by a cache, a monitor near the memory 163 // would not come back from the memory. Therefore
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/gem5/src/sim/ |
H A D | fd_array.cc | 42 #include <memory>
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H A D | eventq.hh | 46 #include <memory> 295 * Events can use automatic memory management by setting the 302 * memory management. For example, events exported to Python need
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/gem5/src/mem/cache/compressors/ |
H A D | cpack.hh | 50 #include <memory>
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/gem5/src/mem/cache/tags/ |
H A D | sector_tags.cc | 39 #include <memory>
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/gem5/src/cpu/kvm/ |
H A D | base.hh | 46 #include <memory> 526 * Inject a memory mapped IO request into gem5 532 * @return Number of ticks spent servicing the memory access 576 * KVM memory port. Uses default MasterPort behavior and provides an
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H A D | vm.cc | 51 #include <memory> 302 /* If we couldn't determine how memory slots there are, guess 32. */ 350 DPRINTF(Kvm, "Mapping %i memory region(s)\n", memories.size()); 365 panic("Tried to map an interleaved memory range into " 373 hack("KVM: Zero memory handled as IO\n"); 395 panic("Out of memory slots.\n"); 447 panic("Failed to setup KVM memory region:\n"
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/gem5/src/mem/ruby/system/ |
H A D | DMASequencer.cc | 31 #include <memory>
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/gem5/src/arch/arm/ |
H A D | semihosting.cc | 572 warn_if(memories.size() > 1, "Multiple physical memory ranges available. " 574 const AddrRange memory = *memories.begin(); local 575 const Addr mem_start = memory.start() + memReserve; 576 Addr mem_end = memory.end(); 578 // Make sure that 32-bit guests can access their memory. 582 "Physical memory out of range for a 32-bit guest."); 584 warn("Some physical memory out of range for a 32-bit guest."); 590 "Physical memory too small to fit desired stack and a heap.");
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H A D | utility.cc | 42 #include <memory>
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/gem5/ext/systemc/src/ |
H A D | systemc.h | 53 #include <memory>
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/gem5/configs/common/ |
H A D | HMC.py | 44 # [2] High performance AXI-4.0 based interconnect for extensible smart memory 110 # same: It has 4 crossbars in HMC memory. All the crossbars are connected 111 # to each other, providing complete memory range. This archicture also covers 113 # crossbars). All the 4 serial links can access complete memory. So each 228 help="memory range for each of the serial links.\ 251 help="Chunk of memory range for each cross bar in\ 274 the HMC device. Note: each vault has a memory\ 281 default="HMC_2500_1x32", help="type of HMC memory to\ 284 help="Number of memory channels") 314 # create memory range [all...] |
/gem5/src/arch/arm/insts/ |
H A D | static_inst.hh | 45 #include <memory>
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/gem5/src/arch/x86/ |
H A D | tlb.cc | 43 #include <memory> 175 DPRINTF(TLB, "Addresses references internal memory.\n"); 179 panic("CPUID memory space not yet implemented!\n"); 189 //any memory dependence calculations will not see these as 279 // If this is true, we're dealing with a request to a non-memory address
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H A D | pagetable_walker.cc | 54 #include <memory> 528 // value back to memory. 638 * in the TLB, this should work with no memory accesses.
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H A D | interrupts.cc | 54 #include <memory>
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/gem5/src/base/ |
H A D | cp_annotate.hh | 48 #include <memory>
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/gem5/src/arch/alpha/ |
H A D | tlb.cc | 36 #include <memory> 222 // IPR memory space not implemented 225 "IPR memory space not implemented!");
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/gem5/ext/googletest/googlemock/test/ |
H A D | gmock-internal-utils_test.cc | 39 #include <memory>
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H A D | gmock-actions_test.cc | 39 #include <memory>
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/gem5/ext/mcpat/ |
H A D | xmlParser.cc | 98 #include <memory.h> 1292 // printf("XMLParser Error: Not enough memory! Aborting...\n"); exit(220); 2350 // Alllocate memory for the XML string + the NULL terminator and
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/gem5/tests/test-progs/asmtest/src/riscv/isa/macros/scalar/ |
H A D | test_macros.h | 215 # Test memory instructions
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/gem5/src/arch/arm/kvm/ |
H A D | arm_cpu.cc | 46 #include <memory>
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/gem5/src/systemc/core/ |
H A D | sc_module.cc | 30 #include <memory>
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/gem5/ext/pybind11/include/pybind11/detail/ |
H A D | common.h | 142 #include <memory> 404 * python side. Non-simple layout allocates the required amount of memory to have multiple
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