Searched refs:ctx (Results 26 - 33 of 33) sorted by relevance

12

/gem5/src/sim/
H A Darguments.hh64 Arguments(ThreadContext *ctx, int n = 0) argument
65 : tc(ctx), number(n), data(new Data())
/gem5/src/arch/riscv/
H A Dprocess.cc104 for (ContextID ctx: contextIds)
105 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U);
114 for (ContextID ctx: contextIds) {
115 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U);
116 PCState pc = system->getThreadContext(ctx)->pcState();
118 system->getThreadContext(ctx)->pcState(pc);
/gem5/src/systemc/tests/systemc/utils/sc_report/cached/
H A Dcached.cpp76 void dump_cached_report(const char* ctx) argument
80 << " from context '" << ctx << "' ";
/gem5/src/cpu/kvm/
H A Dvm.hh421 long contextIdToVCpuId(ContextID ctx) const;
H A Dvm.cc540 KvmVM::contextIdToVCpuId(ContextID ctx) const
544 (system->getThreadContext(ctx)->getCpuPtr())->getVCpuID();
/gem5/src/arch/sparc/
H A Dtlb.hh181 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
H A Dtlb.cc402 DPRINTF(TLB, "TLB: Writing Tag Access: va: %#X ctx: %#X value: %#X\n",
1300 TLB::GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs) argument
1302 uint64_t tag_access = mbits(addr,63,13) | mbits(ctx,12,0);
/gem5/src/mem/
H A Dabstract_mem.cc292 ThreadContext* ctx = system()->getThreadContext(owner_cid); local
293 TheISA::globalClearExclusive(ctx);

Completed in 18 milliseconds

12