Searched refs:_name (Results 151 - 175 of 199) sorted by relevance

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/gem5/src/cpu/simple/
H A D	timing.hh	164 TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu) argument 165 : MasterPort(_name, _cpu), cpu(_cpu),
/gem5/src/mem/cache/
H A D	base.hh	143 CacheMasterPort(const std::string &_name, BaseCache *_cache, argument 146 QueuedMasterPort(_name, _cache, _reqQueue, _snoopRespQueue) 236 MemSidePort(const std::string &_name, BaseCache *_cache, 263 CacheSlavePort(const std::string &_name, BaseCache *_cache, 307 CpuSidePort(const std::string &_name, BaseCache *_cache,
/gem5/src/systemc/tests/systemc/compliance_1666/test00/
H A D	test00.cpp	95 M_src(sc_module_name _name) argument 112 M_dest(sc_module_name _name) argument 221 CM(sc_module_name _name) argument
/gem5/src/sim/
H A D	eventq.hh	823 std::string _name; member in class:EventFunctionWrapper 830 : Event(p), callback(callback), _name(name) 841 return _name + ".wrapped_function_event";
/gem5/src/mem/
H A D	xbar.cc	135 const std::string& _name) : 136 port(_port), xbar(_xbar), _name(_name), state(IDLE), 134 Layer(DstType& _port, BaseXBar& _xbar, const std::string& _name) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/
H A D	child_proc_control.cpp	43 Top(sc_module_name _name) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/
H A D	kill_reset.cpp	41 M3(sc_module_name _name) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/
H A D	mixed_child_procs.cpp	47 Top(sc_module_name _name) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/
H A D	sc_delta_count.cpp	42 Top(sc_module_name _name) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/
H A D	sc_process_handle_less_than.cpp	44 Top(sc_module_name _name) argument
/gem5/src/gpu-compute/
H A D	global_memory_pipeline.cc	59 _name = computeUnit->name() + ".GlobalMemPipeline";
H A D	scoreboard_check_stage.cc	69 _name = computeUnit->name() + ".ScoreboardCheckStage";
/gem5/src/mem/ruby/slicc_interface/
H A D	AbstractController.hh	244 MemoryPort(const std::string &_name, AbstractController *_controller,
H A D	AbstractController.cc	380 AbstractController::MemoryPort::MemoryPort(const std::string &_name, argument 383 : QueuedMasterPort(_name, _controller, reqQueue, snoopRespQueue),
/gem5/ext/mcpat/
H A D	array.cc	66 const InputParameter *configure_interface, string _name, 72 name = _name; 65 ArrayST(XMLNode* _xml_data, const InputParameter *configure_interface, string _name, enum Device_ty device_ty_, double _clockRate, bool opt_local_, enum Core_type core_ty_, bool _is_default) argument
H A D	cachearray.cc	67 const InputParameter *configure_interface, string _name, 73 name = _name; 66 CacheArray(XMLNode* _xml_data, const InputParameter *configure_interface, string _name, enum Device_ty device_ty_, double _clockRate, bool opt_local_, enum Core_type core_ty_, bool _is_default) argument
H A D	logic.cc	40 string _name, double _accesses, 50 name = _name; 142 XMLNode* _xml_data, const string _name, 149 name = _name; 787 InstructionDecoder::InstructionDecoder(XMLNode* _xml_data, const string _name, argument 821 name = _name; 37 selection_logic(XMLNode* _xml_data, bool _is_default, int _win_entries, int issue_width_, const InputParameter *configure_interface, string _name, double _accesses, double clockRate_, enum Device_ty device_ty_, enum Core_type core_ty_) argument 141 dep_resource_conflict_check( XMLNode* _xml_data, const string _name, const InputParameter *configure_interface, const CoreParameters & dyn_p_, int compare_bits_, double clockRate_, bool _is_default) argument
/gem5/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/
H A D	sc_vector.cpp	190 M(sc_module_name _name, int N) argument 303 Top(sc_module_name _name) argument
/gem5/src/systemc/tests/tlm/nb2b_adapter/
H A D	nb2b_adapter.cpp	186 Interconnect(sc_module_name _name, unsigned int _offset) argument 187 : sc_module(_name)
/gem5/src/dev/net/
H A D	i8254xGBe.hh	237 std::string _name; member in class:IGbE::DescCache 272 std::string name() { return _name; }
/gem5/src/python/m5/util/
H A D	dot_writer.py	88 label = simNode._name 298 label = simNode._name
/gem5/src/systemc/core/
H A D	sc_module.cc	269 sc_module::sc_module(const char *_name) : sc_module(sc_module_name(_name)) argument 272 SC_REPORT_WARNING(SC_ID_BAD_SC_MODULE_CONSTRUCTOR_, _name); 274 sc_module::sc_module(const std::string &_name) : argument 275 sc_module(sc_module_name(_name.c_str())) 278 SC_REPORT_WARNING(SC_ID_BAD_SC_MODULE_CONSTRUCTOR_, _name.c_str());
/gem5/src/python/m5/
H A D	SimObject.py	1193 self._name = None 1350 self._name = name 1360 return self._name 1413 return self._name 1414 return ppath + "." + self._name 1418 return self._parent.path_list() + [ self._name, ]
/gem5/src/dev/virtio/
H A D	fs9p.cc	65 P9MsgInfo(P9MsgType _type, std::string _name) argument 66 : type(_type), name(_name) {}
/gem5/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/
H A D	async_reset_port.cpp	52 M(sc_module_name _name) argument 194 Top(sc_module_name _name) argument

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Indexes created Thu Sep 26 06:36:22 EDT 2019